Skip to content

Commit d37d20a

Browse files
committed
[RISCV] Remove untested code from SelectAddrRegRegScale.
This code handled load/store address that are a SHL instruction. That seems very unlikely to occur unless you're accessing an array that starts at address 0. I'm not even sure if you can represent that in llvm IR.
1 parent 9a93de5 commit d37d20a

File tree

1 file changed

+0
-4
lines changed

1 file changed

+0
-4
lines changed

llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp

Lines changed: 0 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -2824,10 +2824,6 @@ bool RISCVDAGToDAGISel::SelectAddrRegRegScale(SDValue Addr,
28242824
Base = Addr.getOperand(0);
28252825
return true;
28262826
}
2827-
} else if (UnwrapShl(Addr, Index, Scale)) {
2828-
EVT VT = Addr.getValueType();
2829-
Base = CurDAG->getRegister(RISCV::X0, VT);
2830-
return true;
28312827
}
28322828

28332829
return false;

0 commit comments

Comments
 (0)