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Fix tests
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4 files changed

+12
-39
lines changed

4 files changed

+12
-39
lines changed

llvm/test/CodeGen/AMDGPU/buffer-fat-pointers-memcpy.ll

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -981,11 +981,11 @@ define amdgpu_kernel void @memcpy_known_medium(ptr addrspace(7) %src, ptr addrsp
981981
; GISEL-GFX942-NEXT: s_mov_b32 s2, s7
982982
; GISEL-GFX942-NEXT: s_waitcnt lgkmcnt(0)
983983
; GISEL-GFX942-NEXT: s_or_b64 s[6:7], s[6:7], s[2:3]
984-
; GISEL-GFX942-NEXT: v_mov_b32_e32 v0, 0x100
985-
; GISEL-GFX942-NEXT: v_mov_b32_e32 v1, s16
984+
; GISEL-GFX942-NEXT: v_mov_b32_e32 v0, s16
985+
; GISEL-GFX942-NEXT: v_mov_b32_e32 v1, 0x100
986986
; GISEL-GFX942-NEXT: .LBB1_1: ; %load-store-loop
987987
; GISEL-GFX942-NEXT: ; =>This Inner Loop Header: Depth=1
988-
; GISEL-GFX942-NEXT: v_add_u32_e32 v62, s0, v1
988+
; GISEL-GFX942-NEXT: v_add_u32_e32 v62, s0, v0
989989
; GISEL-GFX942-NEXT: buffer_load_dwordx4 v[2:5], v62, s[8:11], 0 offen
990990
; GISEL-GFX942-NEXT: buffer_load_dwordx4 v[6:9], v62, s[8:11], 0 offen offset:16
991991
; GISEL-GFX942-NEXT: buffer_load_dwordx4 v[10:13], v62, s[8:11], 0 offen offset:32
@@ -1002,9 +1002,9 @@ define amdgpu_kernel void @memcpy_known_medium(ptr addrspace(7) %src, ptr addrsp
10021002
; GISEL-GFX942-NEXT: buffer_load_dwordx4 v[54:57], v62, s[8:11], 0 offen offset:208
10031003
; GISEL-GFX942-NEXT: buffer_load_dwordx4 v[58:61], v62, s[8:11], 0 offen offset:224
10041004
; GISEL-GFX942-NEXT: buffer_load_dwordx4 a[0:3], v62, s[8:11], 0 offen offset:240
1005-
; GISEL-GFX942-NEXT: v_add_u32_e32 v63, s12, v1
1006-
; GISEL-GFX942-NEXT: v_add_u32_e32 v1, 0x100, v1
1007-
; GISEL-GFX942-NEXT: v_cmp_lt_u32_e32 vcc, v1, v0
1005+
; GISEL-GFX942-NEXT: v_add_u32_e32 v63, s12, v0
1006+
; GISEL-GFX942-NEXT: v_add_u32_e32 v0, 0x100, v0
1007+
; GISEL-GFX942-NEXT: v_cmp_lt_u32_e32 vcc, v0, v1
10081008
; GISEL-GFX942-NEXT: s_waitcnt vmcnt(0)
10091009
; GISEL-GFX942-NEXT: scratch_store_dwordx4 off, a[0:3], off ; 16-byte Folded Spill
10101010
; GISEL-GFX942-NEXT: buffer_store_dwordx4 v[2:5], v63, s[4:7], 0 offen

llvm/test/CodeGen/AMDGPU/machine-scheduler-rematerialization-scoring.mir

Lines changed: 0 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -28,29 +28,6 @@
2828
# | 5 |
2929
# +---+
3030

31-
--- |
32-
define void @small_num_sgprs_as_spill() "amdgpu-num-sgpr"="85" {
33-
ret void
34-
}
35-
define void @small_num_vgprs_as_spill() "amdgpu-num-vgpr"="14" {
36-
ret void
37-
}
38-
define void @dont_remat_waves_per_eu() "amdgpu-flat-work-group-size"="1024,1024" "amdgpu-waves-per-eu"="7,7" {
39-
ret void
40-
}
41-
define void @dont_remat_at_max_occ() "amdgpu-waves-per-eu"="8,8" {
42-
ret void
43-
}
44-
define void @reduce_arch_and_acc_vgrp_spill() "amdgpu-waves-per-eu"="8,8" {
45-
ret void
46-
}
47-
define void @reduce_spill_archvgpr_above_addressable_limit() "amdgpu-flat-work-group-size"="1,64" "amdgpu-waves-per-eu"="1,2" {
48-
ret void
49-
}
50-
define void @reduce_spill_agpr_above_addressable_limit() "amdgpu-flat-work-group-size"="1,64" "amdgpu-waves-per-eu"="1,2" {
51-
ret void
52-
}
53-
---
5431
# %32's defining and using region frequencies are identical therefore it is the
5532
# best register to rematerialize.
5633
name: favor_same_frequency

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.generated.expected

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -83,11 +83,9 @@ attributes #0 = { noredzone nounwind ssp uwtable "frame-pointer"="all" }
8383
; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:8
8484
; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:12
8585
; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:16
86-
; CHECK-NEXT: s_mov_b64 s[4:5], exec
87-
; CHECK-NEXT: s_mov_b64 s[6:7], 0
88-
; CHECK-NEXT: s_and_b64 s[6:7], s[4:5], s[6:7]
89-
; CHECK-NEXT: s_xor_b64 s[4:5], s[6:7], s[4:5]
90-
; CHECK-NEXT: s_mov_b64 exec, s[6:7]
86+
; CHECK-NEXT: s_mov_b64 s[4:5], 0
87+
; CHECK-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
88+
; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[6:7]
9189
; CHECK-NEXT: s_cbranch_execz .LBB0_2
9290
; CHECK-NEXT: ; %bb.1:
9391
; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:4

llvm/test/tools/UpdateTestChecks/update_llc_test_checks/Inputs/amdgpu_generated_funcs.ll.nogenerated.expected

Lines changed: 3 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -24,11 +24,9 @@ define dso_local i32 @check_boundaries() #0 {
2424
; CHECK-NEXT: buffer_store_dword v1, off, s[0:3], s33 offset:8
2525
; CHECK-NEXT: buffer_store_dword v2, off, s[0:3], s33 offset:12
2626
; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s33 offset:16
27-
; CHECK-NEXT: s_mov_b64 s[4:5], exec
28-
; CHECK-NEXT: s_mov_b64 s[6:7], 0
29-
; CHECK-NEXT: s_and_b64 s[6:7], s[4:5], s[6:7]
30-
; CHECK-NEXT: s_xor_b64 s[4:5], s[6:7], s[4:5]
31-
; CHECK-NEXT: s_mov_b64 exec, s[6:7]
27+
; CHECK-NEXT: s_mov_b64 s[4:5], 0
28+
; CHECK-NEXT: s_and_saveexec_b64 s[6:7], s[4:5]
29+
; CHECK-NEXT: s_xor_b64 s[4:5], exec, s[6:7]
3230
; CHECK-NEXT: s_cbranch_execz .LBB0_2
3331
; CHECK-NEXT: ; %bb.1:
3432
; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s33 offset:4

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