Prefer early return

Author: justinfargnoli

llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

@@ -5620,28 +5620,28 @@ static SDValue PerformTruncCombine(SDNode *N,
   case ISD::XOR: {
     EVT VT = N->getValueType(0);
     EVT LogicalVT = LogicalOp.getValueType();
-    if (VT == MVT::i32 && LogicalVT == MVT::i64) {
-      const TargetLowering &TLI = DCI.DAG.getTargetLoweringInfo();
-      if (VT.isScalarInteger() ||
-          TLI.isOperationLegal(LogicalOp.getOpcode(), VT)) {
-        if (all_of(LogicalOp.getNode()->uses(), [](SDNode *U) {
-              return U->isMachineOpcode()
-                         ? U->getMachineOpcode() == NVPTX::CVT_u32_u64
-                         : U->getOpcode() == ISD::TRUNCATE;
-            })) {
-          SDLoc DL(N);
-          SDValue None =
-              DCI.DAG.getTargetConstant(NVPTX::PTXCvtMode::NONE, DL, MVT::i32);
-          SDNode *NarrowL = DCI.DAG.getMachineNode(
-              NVPTX::CVT_u32_u64, DL, VT, LogicalOp.getOperand(0), None);
-          SDNode *NarrowR = DCI.DAG.getMachineNode(
-              NVPTX::CVT_u32_u64, DL, VT, LogicalOp.getOperand(1), None);
-          return DCI.DAG.getNode(LogicalOp.getOpcode(), DL, VT,
-                                 SDValue(NarrowL, 0), SDValue(NarrowR, 0));
-        }
-      }
-    }
-    break;
+    if (VT != MVT::i32 || LogicalVT != MVT::i64) 
+      break;
+    const TargetLowering &TLI = DCI.DAG.getTargetLoweringInfo();
+    if (!VT.isScalarInteger() && 
+        !TLI.isOperationLegal(LogicalOp.getOpcode(), VT))
+      break;
+    if (!all_of(LogicalOp.getNode()->uses(), [](SDNode *U) {
+          return U->isMachineOpcode()
+                      ? U->getMachineOpcode() == NVPTX::CVT_u32_u64
+                      : U->getOpcode() == ISD::TRUNCATE;
+        }))
+      break;
+
+    SDLoc DL(N);
+    SDValue CVTNone =
+        DCI.DAG.getTargetConstant(NVPTX::PTXCvtMode::NONE, DL, MVT::i32);
+    SDNode *NarrowL = DCI.DAG.getMachineNode(
+        NVPTX::CVT_u32_u64, DL, VT, LogicalOp.getOperand(0), CVTNone);
+    SDNode *NarrowR = DCI.DAG.getMachineNode(
+        NVPTX::CVT_u32_u64, DL, VT, LogicalOp.getOperand(1), CVTNone);
+    return DCI.DAG.getNode(LogicalOp.getOpcode(), DL, VT,
+                            SDValue(NarrowL, 0), SDValue(NarrowR, 0));
   }
   }