@@ -70,7 +70,8 @@ class AMDGPUPostLegalizerCombinerImpl : public Combiner {
7070 };
7171
7272 // TODO: Make sure fmin_legacy/fmax_legacy don't canonicalize
73- bool matchFMinFMaxLegacy (MachineInstr &MI, FMinFMaxLegacyInfo &Info) const ;
73+ bool matchFMinFMaxLegacy (MachineInstr &MI, MachineInstr &FCmp,
74+ FMinFMaxLegacyInfo &Info) const ;
7475 void applySelectFCmpToFMinToFMaxLegacy (MachineInstr &MI,
7576 const FMinFMaxLegacyInfo &Info) const ;
7677
@@ -158,17 +159,14 @@ bool AMDGPUPostLegalizerCombinerImpl::tryCombineAll(MachineInstr &MI) const {
158159}
159160
160161bool AMDGPUPostLegalizerCombinerImpl::matchFMinFMaxLegacy (
161- MachineInstr &MI, FMinFMaxLegacyInfo &Info) const {
162- // FIXME: Type predicate on pattern
163- if (MRI.getType (MI.getOperand (0 ).getReg ()) != LLT::scalar (32 ))
164- return false ;
165-
166- Register Cond = MI.getOperand (1 ).getReg ();
167- if (!MRI.hasOneNonDBGUse (Cond) ||
168- !mi_match (Cond, MRI,
169- m_GFCmp (m_Pred (Info.Pred ), m_Reg (Info.LHS ), m_Reg (Info.RHS ))))
162+ MachineInstr &MI, MachineInstr &FCmp, FMinFMaxLegacyInfo &Info) const {
163+ if (!MRI.hasOneNonDBGUse (FCmp.getOperand (0 ).getReg ()))
170164 return false ;
171165
166+ Info.Pred =
167+ static_cast <CmpInst::Predicate>(FCmp.getOperand (1 ).getPredicate ());
168+ Info.LHS = FCmp.getOperand (2 ).getReg ();
169+ Info.RHS = FCmp.getOperand (3 ).getReg ();
172170 Register True = MI.getOperand (2 ).getReg ();
173171 Register False = MI.getOperand (3 ).getReg ();
174172
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