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llvm/lib/Target/NVPTX/NVPTXISelLowering.cpp

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -5693,8 +5693,14 @@ static SDValue combineMINMAX(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
56935693

56945694
const unsigned BitWidth = VT.getSizeInBits();
56955695
SDLoc DL(N);
5696-
auto MatchTuncSat = [&](MVT DestVT) {
5696+
const auto TryToLowerAsSaturatedConversion = [&](MVT DestVT) {
56975697
const unsigned DestBitWidth = DestVT.getSizeInBits();
5698+
5699+
// If the destination is greater than or equal to the source, the min/max
5700+
// comparisons are meaningless/impossible.
5701+
if (DestBitWidth >= BitWidth)
5702+
return SDValue();
5703+
56985704
bool IsSigned;
56995705
if (Ceil == APInt::getSignedMaxValue(DestBitWidth).sext(BitWidth) &&
57005706
Floor == APInt::getSignedMinValue(DestBitWidth).sext(BitWidth))
@@ -5710,13 +5716,10 @@ static SDValue combineMINMAX(SDNode *N, TargetLowering::DAGCombinerInfo &DCI) {
57105716
return DCI.DAG.getExtOrTrunc(IsSigned, Trunc, DL, VT);
57115717
};
57125718

5713-
if (VT != MVT::i16)
5714-
if (auto Res = MatchTuncSat(MVT::i16))
5719+
for (const auto DestVT : {MVT::i16, MVT::i8})
5720+
if (auto Res = TryToLowerAsSaturatedConversion(DestVT))
57155721
return Res;
57165722

5717-
if (auto Res = MatchTuncSat(MVT::i8))
5718-
return Res;
5719-
57205723
return SDValue();
57215724
}
57225725

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