@@ -376,22 +376,22 @@ let SMETargetGuard = "sme2" in {
376376// Outer product and accumulate/subtract
377377//
378378
379- multiclass MOP4<string name, string n, string t, string i, string wide> {
380- def NAME # "_1x1" : Inst<"svmop4" # name # "_1x1_" # n # "[_{d}_{d}]", "vidd", t, MergeNone, i # wide # "_1x1", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>] >;
379+ multiclass MOP4<string name, string n, string t, string i, string wide, list<ImmCheck> checks > {
380+ def NAME # "_1x1" : Inst<"svmop4" # name # "_1x1_" # n # "[_{d}_{d}]", "vidd", t, MergeNone, i # wide # "_1x1", [IsInOutZA, IsStreaming], checks >;
381381}
382382
383- multiclass SUMOP4<string s, string za, string t, string i> {
384- def _1x1 : SInst<"svmop4" # s # "[_1x1_]" # za # "[_{2 }_{3}]",
383+ multiclass SUMOP4<string s, string za, string t, string i, list<ImmCheck> checks > {
384+ def _1x1 : SInst<"svmop4" # s # "[_1x1_]" # za # "[_{d }_{3}]",
385385 "vidu", t, MergeNone, "aarch64_sme_sumop4" # s # i # "_wide_1x1",
386386 [IsStreaming, IsInOutZA],
387- [ImmCheck<0, ImmCheck0_3>] >;
387+ checks >;
388388}
389389
390- multiclass USMOP4<string s, string za, string t, string i> {
391- def _1x1 : SInst<"svmop4" # s # "[_1x1_]" # za # "[_{2 }_{3}]",
390+ multiclass USMOP4<string s, string za, string t, string i, list<ImmCheck> checks > {
391+ def _1x1 : SInst<"svmop4" # s # "[_1x1_]" # za # "[_{d }_{3}]",
392392 "vidx", t, MergeNone, "aarch64_sme_usmop4" # s # i # "_wide_1x1",
393393 [IsStreaming, IsInOutZA],
394- [ImmCheck<0, ImmCheck0_3>] >;
394+ checks >;
395395}
396396
397397let SMETargetGuard = "sme2" in {
@@ -405,24 +405,24 @@ let SMETargetGuard = "sme2" in {
405405
406406 def SVBMOPS : Inst<"svbmops_za32[_{d}]_m", "viPPdd", "iUi", MergeNone, "aarch64_sme_bmops_za32", [IsInOutZA, IsStreaming], [ImmCheck<0, ImmCheck0_3>]>;
407407
408- defm SVSMOP4A_H : MOP4<"a", "za32", "cs", "aarch64_sme_smop4a", "_wide">;
409- defm SVSMOP4S_H : MOP4<"s", "za32", "cs", "aarch64_sme_smop4s", "_wide">;
408+ defm SVSMOP4A_H : MOP4<"a", "za32", "cs", "aarch64_sme_smop4a", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
409+ defm SVSMOP4S_H : MOP4<"s", "za32", "cs", "aarch64_sme_smop4s", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
410410
411- defm SVUMOP4A_H : MOP4<"a", "za32", "UcUs", "aarch64_sme_umop4a", "_wide">;
412- defm SVUMOP4S_H : MOP4<"s", "za32", "UcUs", "aarch64_sme_umop4s", "_wide">;
411+ defm SVUMOP4A_H : MOP4<"a", "za32", "UcUs", "aarch64_sme_umop4a", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
412+ defm SVUMOP4S_H : MOP4<"s", "za32", "UcUs", "aarch64_sme_umop4s", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
413413
414- defm SVFMOP4A_HtoS : MOP4<"a", "za32", "h", "aarch64_sme_mop4a", "_wide">;
415- defm SVFMOP4S_HtoS : MOP4<"s", "za32", "h", "aarch64_sme_mop4s", "_wide">;
416- defm SVFMOP4A_S : MOP4<"a", "za32", "f", "aarch64_sme_mop4a", "">;
417- defm SVFMOP4S_S : MOP4<"s", "za32", "f", "aarch64_sme_mop4s", "">;
414+ defm SVFMOP4A_HtoS : MOP4<"a", "za32", "h", "aarch64_sme_mop4a", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
415+ defm SVFMOP4S_HtoS : MOP4<"s", "za32", "h", "aarch64_sme_mop4s", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
416+ defm SVFMOP4A_S : MOP4<"a", "za32", "f", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_3>] >;
417+ defm SVFMOP4S_S : MOP4<"s", "za32", "f", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_3>] >;
418418
419- defm SVBMOP4A_S : MOP4<"a", "za32", "b", "aarch64_sme_mop4a", "_wide">;
420- defm SVBMOP4S_S : MOP4<"s", "za32", "b", "aarch64_sme_mop4s", "_wide">;
419+ defm SVBMOP4A_S : MOP4<"a", "za32", "b", "aarch64_sme_mop4a", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
420+ defm SVBMOP4S_S : MOP4<"s", "za32", "b", "aarch64_sme_mop4s", "_wide", [ImmCheck<0, ImmCheck0_3>] >;
421421
422- defm SVSUMOP4A_S : SUMOP4<"a", "za32", "cs", "">;
423- defm SVSUMOP4S_S : SUMOP4<"s", "za32", "cs", "">;
424- defm SVUSMOP4A_S : USMOP4<"a", "za32", "UcUs", "">;
425- defm SVUSMOP4S_S : USMOP4<"s", "za32", "UcUs", "">;
422+ defm SVSUMOP4A_S : SUMOP4<"a", "za32", "cs", "", [ImmCheck<0, ImmCheck0_3>] >;
423+ defm SVSUMOP4S_S : SUMOP4<"s", "za32", "cs", "", [ImmCheck<0, ImmCheck0_3>] >;
424+ defm SVUSMOP4A_S : USMOP4<"a", "za32", "UcUs", "", [ImmCheck<0, ImmCheck0_3>] >;
425+ defm SVUSMOP4S_S : USMOP4<"s", "za32", "UcUs", "", [ImmCheck<0, ImmCheck0_3>] >;
426426
427427 // VERTICAL DOT-PRODUCT
428428 def SVVDOT_LANE_ZA32_VG1x2_S : Inst<"svvdot_lane_za32[_{d}]_vg1x2", "vm2di", "s", MergeNone, "aarch64_sme_svdot_lane_za32_vg1x2", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_3>]>;
@@ -474,14 +474,14 @@ let SMETargetGuard = "sme2" in {
474474}
475475
476476let SMETargetGuard = "sme2,sme-i16i64" in {
477- defm SVSMOP4A_HtoD : MOP4<"a", "za64", "s", "aarch64_sme_smop4a_za64", "_wide">;
478- defm SVSMOP4S_HtoD : MOP4<"s", "za64", "s", "aarch64_sme_smop4s_za64", "_wide">;
479- defm SVUMOP4A_HtoD : MOP4<"a", "za64", "Us", "aarch64_sme_umop4a_za64", "_wide">;
480- defm SVUMOP4S_HtoD : MOP4<"s", "za64", "Us", "aarch64_sme_umop4s_za64", "_wide">;
481- defm SVSUMOP4A_D : SUMOP4<"a", "za64", "s", "_za64">;
482- defm SVSUMOP4S_D : SUMOP4<"s", "za64", "s", "_za64">;
483- defm SVUSMOP4A_D : USMOP4<"a", "za64", "Us", "_za64">;
484- defm SVUSMOP4S_D : USMOP4<"s", "za64", "Us", "_za64">;
477+ defm SVSMOP4A_HtoD : MOP4<"a", "za64", "s", "aarch64_sme_smop4a_za64", "_wide", [ImmCheck<0, ImmCheck0_7>] >;
478+ defm SVSMOP4S_HtoD : MOP4<"s", "za64", "s", "aarch64_sme_smop4s_za64", "_wide", [ImmCheck<0, ImmCheck0_7>] >;
479+ defm SVUMOP4A_HtoD : MOP4<"a", "za64", "Us", "aarch64_sme_umop4a_za64", "_wide", [ImmCheck<0, ImmCheck0_7>] >;
480+ defm SVUMOP4S_HtoD : MOP4<"s", "za64", "Us", "aarch64_sme_umop4s_za64", "_wide", [ImmCheck<0, ImmCheck0_7>] >;
481+ defm SVSUMOP4A_D : SUMOP4<"a", "za64", "s", "_za64", [ImmCheck<0, ImmCheck0_7>] >;
482+ defm SVSUMOP4S_D : SUMOP4<"s", "za64", "s", "_za64", [ImmCheck<0, ImmCheck0_7>] >;
483+ defm SVUSMOP4A_D : USMOP4<"a", "za64", "Us", "_za64", [ImmCheck<0, ImmCheck0_7>] >;
484+ defm SVUSMOP4S_D : USMOP4<"s", "za64", "Us", "_za64", [ImmCheck<0, ImmCheck0_7>] >;
485485
486486 def SVVDOT_LANE_ZA64_VG1x4_S : Inst<"svvdot_lane_za64[_{d}]_vg1x4", "vm4di", "s", MergeNone, "aarch64_sme_svdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>;
487487 def SVVDOT_LANE_ZA64_VG1x4_U : Inst<"svvdot_lane_za64[_{d}]_vg1x4", "vm4di", "Us", MergeNone, "aarch64_sme_uvdot_lane_za64_vg1x4", [IsStreaming, IsInOutZA], [ImmCheck<3, ImmCheck0_1>]>;
@@ -519,8 +519,8 @@ let SMETargetGuard = "sme2" in {
519519}
520520
521521let SMETargetGuard = "sme2,sme-f64f64" in {
522- defm SVFMOP4A_D : MOP4<"a", "za64", "d", "aarch64_sme_mop4a", "">;
523- defm SVFMOP4S_D : MOP4<"s", "za64", "d", "aarch64_sme_mop4s", "">;
522+ defm SVFMOP4A_D : MOP4<"a", "za64", "d", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_7>] >;
523+ defm SVFMOP4S_D : MOP4<"s", "za64", "d", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_7>] >;
524524
525525 def SVMLA_MULTI_VG1x2_F64 : Inst<"svmla_za64[_{d}]_vg1x2", "vm22", "d", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
526526 def SVMLA_MULTI_VG1x4_F64 : Inst<"svmla_za64[_{d}]_vg1x4", "vm44", "d", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
@@ -539,8 +539,8 @@ let SMETargetGuard = "sme2,sme-f64f64" in {
539539}
540540
541541let SMETargetGuard = "sme-f16f16" in {
542- defm SVFMOP4A_H : MOP4<"a", "za16", "h", "aarch64_sme_mop4a", "">;
543- defm SVFMOP4S_H : MOP4<"s", "za16", "h", "aarch64_sme_mop4s", "">;
542+ defm SVFMOP4A_H : MOP4<"a", "za16", "h", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_1>] >;
543+ defm SVFMOP4S_H : MOP4<"s", "za16", "h", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_1>] >;
544544
545545 def SVMLA_MULTI_VG1x2_F16 : Inst<"svmla_za16[_f16]_vg1x2", "vm22", "h", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
546546 def SVMLA_MULTI_VG1x4_F16 : Inst<"svmla_za16[_f16]_vg1x4", "vm44", "h", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
@@ -559,8 +559,8 @@ let SMETargetGuard = "sme-f16f16" in {
559559}
560560
561561let SMETargetGuard = "sme-b16b16" in {
562- defm SVBMOP4A_H : MOP4<"a", "za16", "bf", "aarch64_sme_mop4a", "">;
563- defm SVBMOP4S_H : MOP4<"s", "za16", "bf", "aarch64_sme_mop4s", "">;
562+ defm SVBMOP4A_H : MOP4<"a", "za16", "bf", "aarch64_sme_mop4a", "", [ImmCheck<0, ImmCheck0_1>] >;
563+ defm SVBMOP4S_H : MOP4<"s", "za16", "bf", "aarch64_sme_mop4s", "", [ImmCheck<0, ImmCheck0_1>] >;
564564
565565 def SVMLA_MULTI_VG1x2_BF16 : Inst<"svmla_za16[_bf16]_vg1x2", "vm22", "b", MergeNone, "aarch64_sme_fmla_vg1x2", [IsStreaming, IsInOutZA], []>;
566566 def SVMLA_MULTI_VG1x4_BF16 : Inst<"svmla_za16[_bf16]_vg1x4", "vm44", "b", MergeNone, "aarch64_sme_fmla_vg1x4", [IsStreaming, IsInOutZA], []>;
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