|
| 1 | +; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5 |
| 2 | +; RUN: opt -passes="print<access-info>" -disable-output %s 2>&1 | FileCheck %s |
| 3 | + |
| 4 | +define i32 @completely_before_or_after_true_dep_different_size(ptr %d) { |
| 5 | +; CHECK-LABEL: 'completely_before_or_after_true_dep_different_size' |
| 6 | +; CHECK-NEXT: loop: |
| 7 | +; CHECK-NEXT: Memory dependences are safe with run-time checks |
| 8 | +; CHECK-NEXT: Dependences: |
| 9 | +; CHECK-NEXT: Run-time memory checks: |
| 10 | +; CHECK-NEXT: Check 0: |
| 11 | +; CHECK-NEXT: Comparing group GRP0: |
| 12 | +; CHECK-NEXT: %gep.128.iv = getelementptr i64, ptr %gep.128, i64 %iv |
| 13 | +; CHECK-NEXT: Against group GRP1: |
| 14 | +; CHECK-NEXT: %gep.iv = getelementptr i32, ptr %d, i64 %iv |
| 15 | +; CHECK-NEXT: Grouped accesses: |
| 16 | +; CHECK-NEXT: Group GRP0: |
| 17 | +; CHECK-NEXT: (Low: (128 + %d) High: (384 + %d)) |
| 18 | +; CHECK-NEXT: Member: {(128 + %d),+,8}<nw><%loop> |
| 19 | +; CHECK-NEXT: Group GRP1: |
| 20 | +; CHECK-NEXT: (Low: %d High: (128 + %d)) |
| 21 | +; CHECK-NEXT: Member: {%d,+,4}<nw><%loop> |
| 22 | +; CHECK-EMPTY: |
| 23 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 24 | +; CHECK-NEXT: SCEV assumptions: |
| 25 | +; CHECK-EMPTY: |
| 26 | +; CHECK-NEXT: Expressions re-written: |
| 27 | +; |
| 28 | +entry: |
| 29 | + %gep.128 = getelementptr i8, ptr %d, i64 128 |
| 30 | + br label %loop |
| 31 | + |
| 32 | +loop: |
| 33 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 34 | + %gep.128.iv = getelementptr i64, ptr %gep.128, i64 %iv |
| 35 | + store i64 0, ptr %gep.128.iv, align 8 |
| 36 | + %gep.iv = getelementptr i32, ptr %d, i64 %iv |
| 37 | + %l = load i32, ptr %gep.iv, align 4 |
| 38 | + %iv.next = add i64 %iv, 1 |
| 39 | + %ec = icmp eq i64 %iv.next, 32 |
| 40 | + br i1 %ec, label %exit, label %loop |
| 41 | + |
| 42 | +exit: |
| 43 | + ret i32 %l |
| 44 | +} |
| 45 | + |
| 46 | +define i32 @may_overlap_true_dep_different_size(ptr %d) { |
| 47 | +; CHECK-LABEL: 'may_overlap_true_dep_different_size' |
| 48 | +; CHECK-NEXT: loop: |
| 49 | +; CHECK-NEXT: Memory dependences are safe with run-time checks |
| 50 | +; CHECK-NEXT: Dependences: |
| 51 | +; CHECK-NEXT: Run-time memory checks: |
| 52 | +; CHECK-NEXT: Check 0: |
| 53 | +; CHECK-NEXT: Comparing group GRP0: |
| 54 | +; CHECK-NEXT: %gep.128.iv = getelementptr i64, ptr %gep.128, i64 %iv |
| 55 | +; CHECK-NEXT: Against group GRP1: |
| 56 | +; CHECK-NEXT: %gep.iv = getelementptr i32, ptr %d, i64 %iv |
| 57 | +; CHECK-NEXT: Grouped accesses: |
| 58 | +; CHECK-NEXT: Group GRP0: |
| 59 | +; CHECK-NEXT: (Low: (127 + %d) High: (383 + %d)) |
| 60 | +; CHECK-NEXT: Member: {(127 + %d),+,8}<nw><%loop> |
| 61 | +; CHECK-NEXT: Group GRP1: |
| 62 | +; CHECK-NEXT: (Low: %d High: (128 + %d)) |
| 63 | +; CHECK-NEXT: Member: {%d,+,4}<nw><%loop> |
| 64 | +; CHECK-EMPTY: |
| 65 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 66 | +; CHECK-NEXT: SCEV assumptions: |
| 67 | +; CHECK-EMPTY: |
| 68 | +; CHECK-NEXT: Expressions re-written: |
| 69 | +; |
| 70 | +entry: |
| 71 | + %gep.128 = getelementptr i8, ptr %d, i64 127 |
| 72 | + br label %loop |
| 73 | + |
| 74 | +loop: |
| 75 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 76 | + %gep.128.iv = getelementptr i64, ptr %gep.128, i64 %iv |
| 77 | + store i64 0, ptr %gep.128.iv, align 8 |
| 78 | + %gep.iv= getelementptr i32, ptr %d, i64 %iv |
| 79 | + %l = load i32, ptr %gep.iv, align 4 |
| 80 | + %iv.next = add i64 %iv, 1 |
| 81 | + %ec = icmp eq i64 %iv.next, 32 |
| 82 | + br i1 %ec, label %exit, label %loop |
| 83 | + |
| 84 | +exit: |
| 85 | + ret i32 %l |
| 86 | +} |
| 87 | + |
| 88 | +define void @completely_after_stores_with_different_sizes(ptr %dst) { |
| 89 | +; CHECK-LABEL: 'completely_after_stores_with_different_sizes' |
| 90 | +; CHECK-NEXT: loop: |
| 91 | +; CHECK-NEXT: Memory dependences are safe with run-time checks |
| 92 | +; CHECK-NEXT: Dependences: |
| 93 | +; CHECK-NEXT: Run-time memory checks: |
| 94 | +; CHECK-NEXT: Check 0: |
| 95 | +; CHECK-NEXT: Comparing group GRP0: |
| 96 | +; CHECK-NEXT: %gep.iv = getelementptr i16, ptr %dst, i64 %iv |
| 97 | +; CHECK-NEXT: Against group GRP1: |
| 98 | +; CHECK-NEXT: %gep.dst.128.iv = getelementptr i8, ptr %gep.dst.128, i64 %iv |
| 99 | +; CHECK-NEXT: Grouped accesses: |
| 100 | +; CHECK-NEXT: Group GRP0: |
| 101 | +; CHECK-NEXT: (Low: %dst High: (128 + %dst)<nuw>) |
| 102 | +; CHECK-NEXT: Member: {%dst,+,2}<nw><%loop> |
| 103 | +; CHECK-NEXT: Group GRP1: |
| 104 | +; CHECK-NEXT: (Low: (128 + %dst)<nuw> High: (192 + %dst)) |
| 105 | +; CHECK-NEXT: Member: {(128 + %dst)<nuw>,+,1}<nw><%loop> |
| 106 | +; CHECK-EMPTY: |
| 107 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 108 | +; CHECK-NEXT: SCEV assumptions: |
| 109 | +; CHECK-EMPTY: |
| 110 | +; CHECK-NEXT: Expressions re-written: |
| 111 | +; |
| 112 | +entry: |
| 113 | + %gep.dst.128 = getelementptr nuw i8, ptr %dst, i64 128 |
| 114 | + br label %loop |
| 115 | + |
| 116 | +loop: |
| 117 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 118 | + %gep.iv = getelementptr i16, ptr %dst, i64 %iv |
| 119 | + store i16 0, ptr %gep.iv, align 2 |
| 120 | + %gep.dst.128.iv = getelementptr i8, ptr %gep.dst.128, i64 %iv |
| 121 | + store i8 0, ptr %gep.dst.128.iv, align 1 |
| 122 | + %iv.next = add i64 %iv, 1 |
| 123 | + %ec = icmp eq i64 %iv.next, 64 |
| 124 | + br i1 %ec, label %exit, label %loop |
| 125 | + |
| 126 | +exit: |
| 127 | + ret void |
| 128 | +} |
| 129 | + |
| 130 | + |
| 131 | +define void @may_overlap_stores_with_different_sizes(ptr %dst) { |
| 132 | +; CHECK-LABEL: 'may_overlap_stores_with_different_sizes' |
| 133 | +; CHECK-NEXT: loop: |
| 134 | +; CHECK-NEXT: Memory dependences are safe with run-time checks |
| 135 | +; CHECK-NEXT: Dependences: |
| 136 | +; CHECK-NEXT: Run-time memory checks: |
| 137 | +; CHECK-NEXT: Check 0: |
| 138 | +; CHECK-NEXT: Comparing group GRP0: |
| 139 | +; CHECK-NEXT: %gep.iv = getelementptr i16, ptr %dst, i64 %iv |
| 140 | +; CHECK-NEXT: Against group GRP1: |
| 141 | +; CHECK-NEXT: %gep.dst.128.iv = getelementptr i8, ptr %gep.dst.128, i64 %iv |
| 142 | +; CHECK-NEXT: Grouped accesses: |
| 143 | +; CHECK-NEXT: Group GRP0: |
| 144 | +; CHECK-NEXT: (Low: %dst High: (130 + %dst)) |
| 145 | +; CHECK-NEXT: Member: {%dst,+,2}<nw><%loop> |
| 146 | +; CHECK-NEXT: Group GRP1: |
| 147 | +; CHECK-NEXT: (Low: (128 + %dst)<nuw> High: (193 + %dst)) |
| 148 | +; CHECK-NEXT: Member: {(128 + %dst)<nuw>,+,1}<nw><%loop> |
| 149 | +; CHECK-EMPTY: |
| 150 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 151 | +; CHECK-NEXT: SCEV assumptions: |
| 152 | +; CHECK-EMPTY: |
| 153 | +; CHECK-NEXT: Expressions re-written: |
| 154 | +; |
| 155 | +entry: |
| 156 | + %gep.dst.128 = getelementptr nuw i8, ptr %dst, i64 128 |
| 157 | + br label %loop |
| 158 | + |
| 159 | +loop: |
| 160 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 161 | + %gep.iv = getelementptr i16, ptr %dst, i64 %iv |
| 162 | + store i16 0, ptr %gep.iv, align 2 |
| 163 | + %gep.dst.128.iv = getelementptr i8, ptr %gep.dst.128, i64 %iv |
| 164 | + store i8 0, ptr %gep.dst.128.iv, align 1 |
| 165 | + %iv.next = add i64 %iv, 1 |
| 166 | + %ec = icmp eq i64 %iv.next, 65 |
| 167 | + br i1 %ec, label %exit, label %loop |
| 168 | + |
| 169 | +exit: ; preds = %loop |
| 170 | + ret void |
| 171 | +} |
| 172 | + |
| 173 | +define void @completely_before_or_after_non_const_distance(ptr %dst) { |
| 174 | +; CHECK-LABEL: 'completely_before_or_after_non_const_distance' |
| 175 | +; CHECK-NEXT: loop: |
| 176 | +; CHECK-NEXT: Report: unsafe dependent memory operations in loop. Use #pragma clang loop distribute(enable) to allow loop distribution to attempt to isolate the offending operations into a separate loop |
| 177 | +; CHECK-NEXT: Unknown data dependence. |
| 178 | +; CHECK-NEXT: Dependences: |
| 179 | +; CHECK-NEXT: Unknown: |
| 180 | +; CHECK-NEXT: store i32 0, ptr %gep.iv.mul, align 4 -> |
| 181 | +; CHECK-NEXT: store i32 0, ptr %gep.off.iv, align 4 |
| 182 | +; CHECK-EMPTY: |
| 183 | +; CHECK-NEXT: Run-time memory checks: |
| 184 | +; CHECK-NEXT: Grouped accesses: |
| 185 | +; CHECK-EMPTY: |
| 186 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 187 | +; CHECK-NEXT: SCEV assumptions: |
| 188 | +; CHECK-EMPTY: |
| 189 | +; CHECK-NEXT: Expressions re-written: |
| 190 | +; |
| 191 | +entry: |
| 192 | + %gep.off = getelementptr i8, ptr %dst, i64 576 |
| 193 | + br label %loop |
| 194 | + |
| 195 | +loop: |
| 196 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 197 | + %iv.mul = mul i64 %iv, 84 |
| 198 | + %gep.404 = getelementptr i8, ptr %dst, i64 404 |
| 199 | + %gep.iv.mul = getelementptr i8, ptr %gep.404, i64 %iv.mul |
| 200 | + store i32 0, ptr %gep.iv.mul, align 4 |
| 201 | + %gep.off.iv = getelementptr i32, ptr %gep.off, i64 %iv |
| 202 | + store i32 0, ptr %gep.off.iv, align 4 |
| 203 | + %iv.next = add i64 %iv, 1 |
| 204 | + %ec = icmp eq i64 %iv.next, 3 |
| 205 | + br i1 %ec, label %exit, label %loop |
| 206 | + |
| 207 | +exit: |
| 208 | + ret void |
| 209 | +} |
| 210 | + |
| 211 | +define void @overlap_non_const_distance(ptr %dst) { |
| 212 | +; CHECK-LABEL: 'overlap_non_const_distance' |
| 213 | +; CHECK-NEXT: loop: |
| 214 | +; CHECK-NEXT: Report: unsafe dependent memory operations in loop. Use #pragma clang loop distribute(enable) to allow loop distribution to attempt to isolate the offending operations into a separate loop |
| 215 | +; CHECK-NEXT: Unknown data dependence. |
| 216 | +; CHECK-NEXT: Dependences: |
| 217 | +; CHECK-NEXT: Unknown: |
| 218 | +; CHECK-NEXT: store i32 0, ptr %gep.iv.mul, align 4 -> |
| 219 | +; CHECK-NEXT: store i32 0, ptr %gep.off.iv, align 4 |
| 220 | +; CHECK-EMPTY: |
| 221 | +; CHECK-NEXT: Run-time memory checks: |
| 222 | +; CHECK-NEXT: Grouped accesses: |
| 223 | +; CHECK-EMPTY: |
| 224 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 225 | +; CHECK-NEXT: SCEV assumptions: |
| 226 | +; CHECK-EMPTY: |
| 227 | +; CHECK-NEXT: Expressions re-written: |
| 228 | +; |
| 229 | +entry: |
| 230 | + %gep.off = getelementptr i8, ptr %dst, i64 575 |
| 231 | + br label %loop |
| 232 | + |
| 233 | +loop: |
| 234 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 235 | + %iv.mul = mul i64 %iv, 84 |
| 236 | + %gep.404 = getelementptr i8, ptr %dst, i64 404 |
| 237 | + %gep.iv.mul = getelementptr i8, ptr %gep.404, i64 %iv.mul |
| 238 | + store i32 0, ptr %gep.iv.mul, align 4 |
| 239 | + %gep.off.iv = getelementptr i32, ptr %gep.off, i64 %iv |
| 240 | + store i32 0, ptr %gep.off.iv, align 4 |
| 241 | + %iv.next = add i64 %iv, 1 |
| 242 | + %ec = icmp eq i64 %iv.next, 3 |
| 243 | + br i1 %ec, label %exit, label %loop |
| 244 | + |
| 245 | +exit: |
| 246 | + ret void |
| 247 | +} |
| 248 | + |
| 249 | +define void @accesses_completely_before_or_after_instead_backwards_vectorizable(ptr dereferenceable(800) %dst) { |
| 250 | +; CHECK-LABEL: 'accesses_completely_before_or_after_instead_backwards_vectorizable' |
| 251 | +; CHECK-NEXT: loop: |
| 252 | +; CHECK-NEXT: Memory dependences are safe with a maximum safe vector width of 128 bits |
| 253 | +; CHECK-NEXT: Dependences: |
| 254 | +; CHECK-NEXT: BackwardVectorizable: |
| 255 | +; CHECK-NEXT: store i16 0, ptr %gep.mul.2, align 2 -> |
| 256 | +; CHECK-NEXT: store i16 0, ptr %gep.iv.32, align 2 |
| 257 | +; CHECK-EMPTY: |
| 258 | +; CHECK-NEXT: Run-time memory checks: |
| 259 | +; CHECK-NEXT: Grouped accesses: |
| 260 | +; CHECK-EMPTY: |
| 261 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 262 | +; CHECK-NEXT: SCEV assumptions: |
| 263 | +; CHECK-EMPTY: |
| 264 | +; CHECK-NEXT: Expressions re-written: |
| 265 | +; |
| 266 | +entry: |
| 267 | + br label %loop |
| 268 | + |
| 269 | +loop: |
| 270 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 271 | + %mul.2 = shl i64 %iv, 1 |
| 272 | + %gep.mul.2 = getelementptr i16, ptr %dst, i64 %mul.2 |
| 273 | + store i16 0, ptr %gep.mul.2, align 2 |
| 274 | + %iv.32 = add i64 %iv, 32 |
| 275 | + %gep.iv.32 = getelementptr i16, ptr %dst, i64 %iv.32 |
| 276 | + store i16 0, ptr %gep.iv.32, align 2 |
| 277 | + %iv.next = add i64 %iv, 1 |
| 278 | + %ec = icmp eq i64 %iv, 15 |
| 279 | + br i1 %ec, label %exit, label %loop |
| 280 | + |
| 281 | +exit: |
| 282 | + ret void |
| 283 | +} |
| 284 | + |
| 285 | +define void @accesses_may_overlap_backwards_vectorizable(ptr dereferenceable(800) %dst) { |
| 286 | +; CHECK-LABEL: 'accesses_may_overlap_backwards_vectorizable' |
| 287 | +; CHECK-NEXT: loop: |
| 288 | +; CHECK-NEXT: Memory dependences are safe with a maximum safe vector width of 128 bits |
| 289 | +; CHECK-NEXT: Dependences: |
| 290 | +; CHECK-NEXT: BackwardVectorizable: |
| 291 | +; CHECK-NEXT: store i16 0, ptr %gep.mul.2, align 2 -> |
| 292 | +; CHECK-NEXT: store i16 0, ptr %gep.iv.32, align 2 |
| 293 | +; CHECK-EMPTY: |
| 294 | +; CHECK-NEXT: Run-time memory checks: |
| 295 | +; CHECK-NEXT: Grouped accesses: |
| 296 | +; CHECK-EMPTY: |
| 297 | +; CHECK-NEXT: Non vectorizable stores to invariant address were not found in loop. |
| 298 | +; CHECK-NEXT: SCEV assumptions: |
| 299 | +; CHECK-EMPTY: |
| 300 | +; CHECK-NEXT: Expressions re-written: |
| 301 | +; |
| 302 | +entry: |
| 303 | + br label %loop |
| 304 | + |
| 305 | +loop: |
| 306 | + %iv = phi i64 [ 0, %entry ], [ %iv.next, %loop ] |
| 307 | + %mul.2 = shl i64 %iv, 1 |
| 308 | + %gep.mul.2 = getelementptr i16, ptr %dst, i64 %mul.2 |
| 309 | + store i16 0, ptr %gep.mul.2, align 2 |
| 310 | + %iv.32 = add i64 %iv, 32 |
| 311 | + %gep.iv.32 = getelementptr i16, ptr %dst, i64 %iv.32 |
| 312 | + store i16 0, ptr %gep.iv.32, align 2 |
| 313 | + %iv.next = add i64 %iv, 1 |
| 314 | + %ec = icmp eq i64 %iv, 16 |
| 315 | + br i1 %ec, label %exit, label %loop |
| 316 | + |
| 317 | +exit: |
| 318 | + ret void |
| 319 | +} |
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