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Remove unnecessary type checking
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llvm/lib/Target/AArch64/AArch64ISelLowering.cpp

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@@ -21823,15 +21823,6 @@ SDValue tryLowerPartialReductionToWideAdd(SDNode *N,
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!(InputVT == MVT::nxv16i8 && AccVT == MVT::nxv8i16))
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return SDValue();
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// To do this transformation, output element size needs to be double input
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// element size, and output number of elements needs to be half the input
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// number of elements
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if (InputVT.getVectorElementType().getSizeInBits() * 2 !=
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AccElemVT.getSizeInBits() ||
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AccVT.getVectorElementCount() * 2 != InputVT.getVectorElementCount() ||
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AccVT.isScalableVector() != InputVT.isScalableVector())
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return SDValue();
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bool InputIsSigned = ExtInputOpcode == ISD::SIGN_EXTEND;
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auto BottomIntrinsic = InputIsSigned ? Intrinsic::aarch64_sve_saddwb
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: Intrinsic::aarch64_sve_uaddwb;

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