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[SPIRV] Add support for CodeSectionINTEL addrspace in legalizer
Signed-off-by: Nick Sarnie <[email protected]>
1 parent 260df80 commit d7eff11

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6 files changed

+96
-14
lines changed

6 files changed

+96
-14
lines changed

‎llvm/lib/Target/SPIRV/SPIRVLegalizerInfo.cpp‎

Lines changed: 26 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -84,17 +84,19 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
8484
const LLT p6 = LLT::pointer(6, PSize); // SPV_INTEL_usm_storage_classes (Host)
8585
const LLT p7 = LLT::pointer(7, PSize); // Input
8686
const LLT p8 = LLT::pointer(8, PSize); // Output
87+
const LLT p9 =
88+
LLT::pointer(9, PSize); // CodeSectionINTEL, SPV_INTEL_function_pointers
8789
const LLT p10 = LLT::pointer(10, PSize); // Private
8890
const LLT p11 = LLT::pointer(11, PSize); // StorageBuffer
8991
const LLT p12 = LLT::pointer(12, PSize); // Uniform
9092

9193
// TODO: remove copy-pasting here by using concatenation in some way.
9294
auto allPtrsScalarsAndVectors = {
93-
p0, p1, p2, p3, p4, p5, p6, p7, p8,
94-
p10, p11, p12, s1, s8, s16, s32, s64, v2s1,
95-
v2s8, v2s16, v2s32, v2s64, v3s1, v3s8, v3s16, v3s32, v3s64,
96-
v4s1, v4s8, v4s16, v4s32, v4s64, v8s1, v8s8, v8s16, v8s32,
97-
v8s64, v16s1, v16s8, v16s16, v16s32, v16s64};
95+
p0, p1, p2, p3, p4, p5, p6, p7, p8,
96+
p9, p10, p11, p12, s1, s8, s16, s32, s64,
97+
v2s1, v2s8, v2s16, v2s32, v2s64, v3s1, v3s8, v3s16, v3s32,
98+
v3s64, v4s1, v4s8, v4s16, v4s32, v4s64, v8s1, v8s8, v8s16,
99+
v8s32, v8s64, v16s1, v16s8, v16s16, v16s32, v16s64};
98100

99101
auto allVectors = {v2s1, v2s8, v2s16, v2s32, v2s64, v3s1, v3s8,
100102
v3s16, v3s32, v3s64, v4s1, v4s8, v4s16, v4s32,
@@ -121,10 +123,10 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
121123
s16, s32, s64, v2s16, v2s32, v2s64, v3s16, v3s32, v3s64,
122124
v4s16, v4s32, v4s64, v8s16, v8s32, v8s64, v16s16, v16s32, v16s64};
123125

124-
auto allFloatAndIntScalarsAndPtrs = {s8, s16, s32, s64, p0, p1, p2, p3,
125-
p4, p5, p6, p7, p8, p10, p11, p12};
126+
auto allFloatAndIntScalarsAndPtrs = {s8, s16, s32, s64, p0, p1, p2, p3, p4,
127+
p5, p6, p7, p8, p9, p10, p11, p12};
126128

127-
auto allPtrs = {p0, p1, p2, p3, p4, p5, p6, p7, p8, p10, p11, p12};
129+
auto allPtrs = {p0, p1, p2, p3, p4, p5, p6, p7, p8, p9, p10, p11, p12};
128130

129131
bool IsExtendedInts =
130132
ST.canUseExtension(
@@ -177,15 +179,22 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
177179
getActionDefinitionsBuilder(G_UNMERGE_VALUES).alwaysLegal();
178180

179181
getActionDefinitionsBuilder({G_MEMCPY, G_MEMMOVE})
182+
.unsupportedIf(LegalityPredicates::any(typeIs(0, p9), typeIs(1, p9)))
180183
.legalIf(all(typeInSet(0, allPtrs), typeInSet(1, allPtrs)));
181184

182-
getActionDefinitionsBuilder(G_MEMSET).legalIf(
183-
all(typeInSet(0, allPtrs), typeInSet(1, allIntScalars)));
185+
getActionDefinitionsBuilder(G_MEMSET)
186+
.unsupportedIf(typeIs(0, p9))
187+
.legalIf(all(typeInSet(0, allPtrs), typeInSet(1, allIntScalars)));
184188

185189
getActionDefinitionsBuilder(G_ADDRSPACE_CAST)
190+
.unsupportedIf(
191+
LegalityPredicates::any(all(typeIs(0, p9), typeIsNot(1, p9)),
192+
all(typeIsNot(0, p9), typeIs(1, p9))))
186193
.legalForCartesianProduct(allPtrs, allPtrs);
187194

188-
getActionDefinitionsBuilder({G_LOAD, G_STORE}).legalIf(typeInSet(1, allPtrs));
195+
getActionDefinitionsBuilder({G_LOAD, G_STORE})
196+
.unsupportedIf(typeIs(1, p9))
197+
.legalIf(typeInSet(1, allPtrs));
189198

190199
getActionDefinitionsBuilder({G_SMIN, G_SMAX, G_UMIN, G_UMAX, G_ABS,
191200
G_BITREVERSE, G_SADDSAT, G_UADDSAT, G_SSUBSAT,
@@ -247,9 +256,12 @@ SPIRVLegalizerInfo::SPIRVLegalizerInfo(const SPIRVSubtarget &ST) {
247256

248257
// ST.canDirectlyComparePointers() for pointer args is supported in
249258
// legalizeCustom().
250-
getActionDefinitionsBuilder(G_ICMP).customIf(
251-
all(typeInSet(0, allBoolScalarsAndVectors),
252-
typeInSet(1, allPtrsScalarsAndVectors)));
259+
getActionDefinitionsBuilder(G_ICMP)
260+
.unsupportedIf(LegalityPredicates::any(
261+
all(typeIs(0, p9), typeInSet(1, allPtrs), typeIsNot(1, p9)),
262+
all(typeInSet(0, allPtrs), typeIsNot(0, p9), typeIs(1, p9))))
263+
.customIf(all(typeInSet(0, allBoolScalarsAndVectors),
264+
typeInSet(1, allPtrsScalarsAndVectors)));
253265

254266
getActionDefinitionsBuilder(G_FCMP).legalIf(
255267
all(typeInSet(0, allBoolScalarsAndVectors),

‎llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-addrspacecast.ll‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
; RUN: not llc --global-isel %s -o /dev/null 2>&1 | FileCheck %s
2+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"
3+
target triple = "spirv64-intel"
4+
5+
define void @addrspacecast(ptr addrspace(9) %a) {
6+
; CHECK: unable to legalize instruction: %{{.*}}:pid(p4) = G_ADDRSPACE_CAST %{{.*}}:pid(p9)
7+
%res1 = addrspacecast ptr addrspace(9) %a to ptr addrspace(4)
8+
ret void
9+
}

‎llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-load.ll‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
; RUN: not llc --global-isel %s -o /dev/null 2>&1 | FileCheck %s
2+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"
3+
target triple = "spirv64-intel"
4+
5+
define void @memset(ptr addrspace(9) %a) {
6+
; CHECK: unable to legalize instruction: %{{.*}}:iid(s32) = G_LOAD %{{.*}}:pid(p9)
7+
%val = load i32, ptr addrspace(9) %a
8+
ret void
9+
}

‎llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-memcpy.ll‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
; RUN: not llc --global-isel %s -o /dev/null 2>&1 | FileCheck %s
2+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"
3+
target triple = "spirv64-intel"
4+
5+
define void @memcpy(ptr addrspace(9) %a) {
6+
; CHECK: unable to legalize instruction: G_MEMCPY %{{.*}}:pid(p9), %{{.*}}:pid(p0), %{{.*}}:iid(s64), 0
7+
call void @llvm.memcpy.p9.p0.i64(ptr addrspace(9) %a, ptr null, i32 1, i1 0)
8+
ret void
9+
}

‎llvm/test/CodeGen/SPIRV/GlobalISel/fn-ptr-memset.ll‎

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,9 @@
1+
; RUN: not llc --global-isel %s -o /dev/null 2>&1 | FileCheck %s
2+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"
3+
target triple = "spirv64-intel"
4+
5+
define void @memset(ptr addrspace(9) %a) {
6+
; CHECK: unable to legalize instruction: G_MEMSET %{{.*}}:pid(p9), %{{.*}}:iid(s8), %{{.*}}:iid(s64)
7+
call void @llvm.memset.p9.i32(ptr addrspace(9) %a, i8 0, i32 1, i1 0)
8+
ret void
9+
}

‎llvm/test/CodeGen/SPIRV/extensions/SPV_INTEL_function_pointers/fp_cmp.ll‎

Lines changed: 34 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,34 @@
1+
; RUN: llc -verify-machineinstrs -O0 -mtriple=spirv64-intel --spirv-ext=+SPV_INTEL_function_pointers %s -o - | FileCheck %s
2+
; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-intel %s -o - -filetype=obj | spirv-val %}
3+
4+
; CHECK-DAG: OpCapability FunctionPointersINTEL
5+
; CHECK: OpExtension "SPV_INTEL_function_pointers"
6+
7+
; CHECK: OpName %[[F1:.*]] "f1"
8+
; CHECK: OpName %[[F2:.*]] "f2"
9+
10+
; CHECK: %[[TyBool:.*]] = OpTypeBool
11+
12+
; CHECK %[[F1Ptr:.*]] = OpConstantFunctionPointerINTEL %{{.*}} %[[F2]]
13+
; CHECK %[[F2Ptr:.*]] = OpConstantFunctionPointerINTEL %{{.*}} %[[F2]]
14+
15+
; CHECK OpPtrEqual %[[TyBool]] %[[F1Ptr]] %[[F2Ptr]]
16+
17+
target datalayout = "e-i64:64-v16:16-v24:32-v32:32-v48:64-v96:128-v192:256-v256:256-v512:512-v1024:1024-n8:16:32:64-G1-P9-A0"
18+
target triple = "spirv64-intel"
19+
20+
define spir_func void @f1() addrspace(9) {
21+
entry:
22+
ret void
23+
}
24+
25+
define spir_func void @f2() addrspace(9) {
26+
entry:
27+
ret void
28+
}
29+
30+
define spir_kernel void @foo() addrspace(9) {
31+
entry:
32+
%a = icmp eq ptr addrspace(9) @f1, @f2
33+
ret void
34+
}

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