address review comments II

Author: Thorsten Schütt

llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign-mir.mir

@@ -0,0 +1,37 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple aarch64 -run-pass=aarch64-prelegalizer-combiner -verify-machineinstrs %s -o - | FileCheck %s
+
+
+---
+name:            icmp_samesign
+body:             |
+  bb.0:
+    liveins: $w0, $w1
+
+    ; CHECK-LABEL: name: icmp_samesign
+    ; CHECK: liveins: $w0, $w1
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: %y:_(s32) = COPY $w1
+    ; CHECK-NEXT: %cmp:_(s1) = samesign G_ICMP intpred(eq), %y(s32), %y
+    ; CHECK-NEXT: %zext:_(s32) = G_ZEXT %cmp(s1)
+    ; CHECK-NEXT: $w0 = COPY %zext(s32)
+    ; CHECK-NEXT: RET_ReallyLR implicit $w0
+    %x:_(s32) = COPY $w0
+    %y:_(s32) = COPY $w1
+    %cmp:_(s1) = samesign G_ICMP intpred(eq), %y:_(s32), %y:_
+    %zext:_(s32) = G_ZEXT %cmp:_(s1)
+    $w0 = COPY %zext
+    RET_ReallyLR implicit $w0
+
+---
+name:            icmp_differentsign
+body:             |
+  bb.0:
+    liveins: $w0, $w1
+
+    %x:_(s32) = COPY $w0
+    %y:_(s32) = COPY $w1
+    %cmp:_(s1) = G_ICMP intpred(eq), %y:_(s32), %y:_
+    %zext:_(s32) = G_ZEXT %cmp:_(s1)
+    $w0 = COPY %zext
+    RET_ReallyLR implicit $w0

llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-samesign.ll

@@ -1,5 +1,5 @@
 ; NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 4
-; RUN: llc -mtriple=aarch64-linux-gnu -O0 -stop-after=irtranslator -global-isel %s -o - 2>&1 | FileCheck %s
+; RUN: llc -global-isel -mtriple=aarch64-linux-gnu -O0 -stop-after=irtranslator < %s | FileCheck %s
 
 
 define <2 x i1> @call_icmp_samesign_vector(<2 x i32> %a, <2 x i32> %b) {