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[NFC][RISCV] Refactor allocation of the stack space (#116625)
Separates the stack allocations from prologue in preparation for the stack clash protection support.
1 parent 9cc2502 commit d88ed93

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2 files changed

+28
-19
lines changed

2 files changed

+28
-19
lines changed

llvm/lib/Target/RISCV/RISCVFrameLowering.cpp

Lines changed: 25 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -610,6 +610,25 @@ static MCCFIInstruction createDefCFAOffset(const TargetRegisterInfo &TRI,
610610
Comment.str());
611611
}
612612

613+
void RISCVFrameLowering::allocateStack(MachineBasicBlock &MBB,
614+
MachineBasicBlock::iterator MBBI,
615+
StackOffset Offset, bool EmitCFI,
616+
unsigned CFIIndex) const {
617+
DebugLoc DL;
618+
const RISCVRegisterInfo *RI = STI.getRegisterInfo();
619+
const RISCVInstrInfo *TII = STI.getInstrInfo();
620+
621+
RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg, Offset, MachineInstr::FrameSetup,
622+
getStackAlign());
623+
624+
if (EmitCFI) {
625+
// Emit ".cfi_def_cfa_offset StackSize"
626+
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
627+
.addCFIIndex(CFIIndex)
628+
.setMIFlag(MachineInstr::FrameSetup);
629+
}
630+
}
631+
613632
void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
614633
MachineBasicBlock &MBB) const {
615634
MachineFrameInfo &MFI = MF.getFrameInfo();
@@ -726,16 +745,10 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
726745

727746
if (StackSize != 0) {
728747
// Allocate space on the stack if necessary.
729-
RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
730-
StackOffset::getFixed(-StackSize), MachineInstr::FrameSetup,
731-
getStackAlign());
732-
733-
// Emit ".cfi_def_cfa_offset RealStackSize"
734748
unsigned CFIIndex = MF.addFrameInst(
735749
MCCFIInstruction::cfiDefCfaOffset(nullptr, RealStackSize));
736-
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
737-
.addCFIIndex(CFIIndex)
738-
.setMIFlag(MachineInstr::FrameSetup);
750+
allocateStack(MBB, MBBI, StackOffset::getFixed(-StackSize),
751+
/*EmitCFI=*/ true, CFIIndex);
739752
}
740753

741754
// The frame pointer is callee-saved, and code has been generated for us to
@@ -776,20 +789,13 @@ void RISCVFrameLowering::emitPrologue(MachineFunction &MF,
776789
getStackSizeWithRVVPadding(MF) - FirstSPAdjustAmount;
777790
assert(SecondSPAdjustAmount > 0 &&
778791
"SecondSPAdjustAmount should be greater than zero");
779-
RI->adjustReg(MBB, MBBI, DL, SPReg, SPReg,
780-
StackOffset::getFixed(-SecondSPAdjustAmount),
781-
MachineInstr::FrameSetup, getStackAlign());
782792

783793
// If we are using a frame-pointer, and thus emitted ".cfi_def_cfa fp, 0",
784794
// don't emit an sp-based .cfi_def_cfa_offset
785-
if (!hasFP(MF)) {
786-
// Emit ".cfi_def_cfa_offset StackSize"
787-
unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(
788-
nullptr, getStackSizeWithRVVPadding(MF)));
789-
BuildMI(MBB, MBBI, DL, TII->get(TargetOpcode::CFI_INSTRUCTION))
790-
.addCFIIndex(CFIIndex)
791-
.setMIFlag(MachineInstr::FrameSetup);
792-
}
795+
unsigned CFIIndex = MF.addFrameInst(MCCFIInstruction::cfiDefCfaOffset(
796+
nullptr, getStackSizeWithRVVPadding(MF)));
797+
allocateStack(MBB, MBBI, StackOffset::getFixed(-SecondSPAdjustAmount),
798+
!hasFP(MF), CFIIndex);
793799
}
794800

795801
if (RVVStackSize) {

llvm/lib/Target/RISCV/RISCVFrameLowering.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -78,6 +78,9 @@ class RISCVFrameLowering : public TargetFrameLowering {
7878
return StackId != TargetStackID::ScalableVector;
7979
}
8080

81+
void allocateStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator MBBI,
82+
StackOffset Offset, bool EmitCFI, unsigned CFIIndex) const;
83+
8184
protected:
8285
const RISCVSubtarget &STI;
8386

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