@@ -3300,3 +3300,93 @@ entry:
33003300 %cmp = icmp ult i32 %add , 253
33013301 ret i1 %cmp
33023302}
3303+
3304+ define i1 @val_is_aligend_sub (i32 %num , i32 %val ) {
3305+ ; CHECK-LABEL: @val_is_aligend_sub(
3306+ ; CHECK-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[NUM:%.*]])
3307+ ; CHECK-NEXT: [[POW:%.*]] = icmp eq i32 [[TMP1]], 1
3308+ ; CHECK-NEXT: call void @llvm.assume(i1 [[POW]])
3309+ ; CHECK-NEXT: [[NEG:%.*]] = add i32 [[NUM]], -1
3310+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED:%.*]], [[NEG]]
3311+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], 0
3312+ ; CHECK-NEXT: ret i1 [[_0]]
3313+ ;
3314+ %1 = tail call range(i32 1 , 33 ) i32 @llvm.ctpop.i32 (i32 %val )
3315+ %pow = icmp eq i32 %1 , 1
3316+ call void @llvm.assume (i1 %pow )
3317+
3318+ %mask = sub i32 %val , 1
3319+ %neg = sub nsw i32 0 , %val
3320+
3321+ %num.biased = add i32 %num , %mask
3322+ %_2.sroa.0.0 = and i32 %num.biased , %neg
3323+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3324+ ret i1 %_0
3325+ }
3326+
3327+ define i1 @val_is_aligend_add (i32 %num , i32 %val ) {
3328+ ; CHECK-LABEL: @val_is_aligend_add(
3329+ ; CHECK-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[NUM:%.*]])
3330+ ; CHECK-NEXT: [[POW:%.*]] = icmp eq i32 [[TMP1]], 1
3331+ ; CHECK-NEXT: call void @llvm.assume(i1 [[POW]])
3332+ ; CHECK-NEXT: [[NEG:%.*]] = add i32 [[NUM]], -1
3333+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED:%.*]], [[NEG]]
3334+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], 0
3335+ ; CHECK-NEXT: ret i1 [[_0]]
3336+ ;
3337+ %1 = tail call range(i32 1 , 33 ) i32 @llvm.ctpop.i32 (i32 %val )
3338+ %pow = icmp eq i32 %1 , 1
3339+ call void @llvm.assume (i1 %pow )
3340+
3341+ %mask = add i32 %val , -1
3342+ %neg = sub nsw i32 0 , %val
3343+
3344+ %num.biased = add i32 %num , %mask
3345+ %_2.sroa.0.0 = and i32 %num.biased , %neg
3346+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3347+ ret i1 %_0
3348+ }
3349+
3350+ define i1 @val_is_aligend_const_pow2 (i32 %num ) {
3351+ ; CHECK-LABEL: @val_is_aligend_const_pow2(
3352+ ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 4095
3353+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 0
3354+ ; CHECK-NEXT: ret i1 [[_0]]
3355+ ;
3356+ %num.biased = add i32 %num , 4095
3357+ %_2.sroa.0.0 = and i32 %num.biased , -4096
3358+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3359+ ret i1 %_0
3360+ }
3361+
3362+ ; Should not work for non-power-of-two cases
3363+ define i1 @val_is_aligend_const_non-pow2 (i32 %num ) {
3364+ ; CHECK-LABEL: @val_is_aligend_const_non-pow2(
3365+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 6
3366+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -7
3367+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3368+ ; CHECK-NEXT: ret i1 [[_0]]
3369+ ;
3370+ %num.biased = add i32 %num , 6
3371+ %_2.sroa.0.0 = and i32 %num.biased , -7
3372+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3373+ ret i1 %_0
3374+ }
3375+
3376+ define i1 @val_is_aligend_non_pow (i32 %num , i32 %val ) {
3377+ ; CHECK-LABEL: @val_is_aligend_non_pow(
3378+ ; CHECK-NEXT: [[MASK:%.*]] = add i32 [[VAL:%.*]], -1
3379+ ; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[VAL]]
3380+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], [[MASK]]
3381+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], [[NEG]]
3382+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
3383+ ; CHECK-NEXT: ret i1 [[_0]]
3384+ ;
3385+ %mask = add i32 %val , -1
3386+ %neg = sub nsw i32 0 , %val
3387+
3388+ %num.biased = add i32 %num , %mask
3389+ %_2.sroa.0.0 = and i32 %num.biased , %neg
3390+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
3391+ ret i1 %_0
3392+ }
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