@@ -3300,3 +3300,93 @@ entry:
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%cmp = icmp ult i32 %add , 253
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ret i1 %cmp
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}
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+
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+ define i1 @val_is_aligend_sub (i32 %num , i32 %val ) {
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+ ; CHECK-LABEL: @val_is_aligend_sub(
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+ ; CHECK-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[NUM:%.*]])
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+ ; CHECK-NEXT: [[POW:%.*]] = icmp eq i32 [[TMP1]], 1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[POW]])
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+ ; CHECK-NEXT: [[NEG:%.*]] = add i32 [[NUM]], -1
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+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED:%.*]], [[NEG]]
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+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], 0
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+ ; CHECK-NEXT: ret i1 [[_0]]
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+ ;
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+ %1 = tail call range(i32 1 , 33 ) i32 @llvm.ctpop.i32 (i32 %val )
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+ %pow = icmp eq i32 %1 , 1
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+ call void @llvm.assume (i1 %pow )
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+
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+ %mask = sub i32 %val , 1
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+ %neg = sub nsw i32 0 , %val
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+
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+ %num.biased = add i32 %num , %mask
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+ %_2.sroa.0.0 = and i32 %num.biased , %neg
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+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
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+ ret i1 %_0
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+ }
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+
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+ define i1 @val_is_aligend_add (i32 %num , i32 %val ) {
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+ ; CHECK-LABEL: @val_is_aligend_add(
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+ ; CHECK-NEXT: [[TMP1:%.*]] = tail call range(i32 1, 33) i32 @llvm.ctpop.i32(i32 [[NUM:%.*]])
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+ ; CHECK-NEXT: [[POW:%.*]] = icmp eq i32 [[TMP1]], 1
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+ ; CHECK-NEXT: call void @llvm.assume(i1 [[POW]])
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+ ; CHECK-NEXT: [[NEG:%.*]] = add i32 [[NUM]], -1
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+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED:%.*]], [[NEG]]
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+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], 0
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+ ; CHECK-NEXT: ret i1 [[_0]]
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+ ;
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+ %1 = tail call range(i32 1 , 33 ) i32 @llvm.ctpop.i32 (i32 %val )
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+ %pow = icmp eq i32 %1 , 1
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+ call void @llvm.assume (i1 %pow )
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+
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+ %mask = add i32 %val , -1
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+ %neg = sub nsw i32 0 , %val
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+
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+ %num.biased = add i32 %num , %mask
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+ %_2.sroa.0.0 = and i32 %num.biased , %neg
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+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
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+ ret i1 %_0
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+ }
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+
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+ define i1 @val_is_aligend_const_pow2 (i32 %num ) {
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+ ; CHECK-LABEL: @val_is_aligend_const_pow2(
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+ ; CHECK-NEXT: [[TMP1:%.*]] = and i32 [[NUM:%.*]], 4095
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+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[TMP1]], 0
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+ ; CHECK-NEXT: ret i1 [[_0]]
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+ ;
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+ %num.biased = add i32 %num , 4095
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+ %_2.sroa.0.0 = and i32 %num.biased , -4096
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+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
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+ ret i1 %_0
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+ }
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+
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+ ; Should not work for non-power-of-two cases
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+ define i1 @val_is_aligend_const_non-pow2 (i32 %num ) {
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+ ; CHECK-LABEL: @val_is_aligend_const_non-pow2(
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+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], 6
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+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], -7
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+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
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+ ; CHECK-NEXT: ret i1 [[_0]]
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+ ;
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+ %num.biased = add i32 %num , 6
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+ %_2.sroa.0.0 = and i32 %num.biased , -7
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+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
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+ ret i1 %_0
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+ }
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+
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+ define i1 @val_is_aligend_non_pow (i32 %num , i32 %val ) {
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+ ; CHECK-LABEL: @val_is_aligend_non_pow(
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+ ; CHECK-NEXT: [[MASK:%.*]] = add i32 [[VAL:%.*]], -1
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+ ; CHECK-NEXT: [[NEG:%.*]] = sub nsw i32 0, [[VAL]]
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+ ; CHECK-NEXT: [[NUM_BIASED:%.*]] = add i32 [[NUM:%.*]], [[MASK]]
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+ ; CHECK-NEXT: [[_2_SROA_0_0:%.*]] = and i32 [[NUM_BIASED]], [[NEG]]
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+ ; CHECK-NEXT: [[_0:%.*]] = icmp eq i32 [[_2_SROA_0_0]], [[NUM]]
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+ ; CHECK-NEXT: ret i1 [[_0]]
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+ ;
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+ %mask = add i32 %val , -1
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+ %neg = sub nsw i32 0 , %val
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+
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+ %num.biased = add i32 %num , %mask
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+ %_2.sroa.0.0 = and i32 %num.biased , %neg
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+ %_0 = icmp eq i32 %_2.sroa.0.0 , %num
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+ ret i1 %_0
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+ }
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