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[AMDGPU] Consider FLAT instructions for VMEM hazard detection
In general, "Flat instructions look at the per-workitem address and determine for each work item if the target memory address is in global, private or scratch memory." (RDNA2 ISA) That means that FLAT instructions need to be considered for VMEM hazards even without "specific segment". It should not be needed for DMA VMEM/FLAT instructions, though.
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-7
lines changed

2 files changed

+12
-7
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llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp

Lines changed: 6 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -1424,9 +1424,9 @@ static bool shouldRunLdsBranchVmemWARHazardFixup(const MachineFunction &MF,
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bool HasVmem = false;
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for (auto &MBB : MF) {
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for (auto &MI : MBB) {
1427-
HasLds |= SIInstrInfo::isDS(MI);
1428-
HasVmem |=
1429-
SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI);
1427+
HasLds |= SIInstrInfo::isDS(MI) || SIInstrInfo::isLDSDMA(MI);
1428+
HasVmem |= (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isFLAT(MI)) &&
1429+
!SIInstrInfo::isLDSDMA(MI);
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if (HasLds && HasVmem)
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return true;
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}
@@ -1448,9 +1448,10 @@ bool GCNHazardRecognizer::fixLdsBranchVmemWARHazard(MachineInstr *MI) {
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assert(!ST.hasExtendedWaitCounts());
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auto IsHazardInst = [](const MachineInstr &MI) {
1451-
if (SIInstrInfo::isDS(MI))
1451+
if (SIInstrInfo::isDS(MI) || SIInstrInfo::isLDSDMA(MI))
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return 1;
1453-
if (SIInstrInfo::isVMEM(MI) || SIInstrInfo::isSegmentSpecificFLAT(MI))
1453+
if ((SIInstrInfo::isVMEM(MI) || SIInstrInfo::isFLAT(MI)) &&
1454+
!SIInstrInfo::isLDSDMA(MI))
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return 2;
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return 0;
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};

llvm/test/CodeGen/AMDGPU/lds-branch-vmem-hazard.mir

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -269,11 +269,15 @@ body: |
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S_ENDPGM 0
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...
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272-
# GCN-LABEL: name: no_hazard_lds_branch_flat
272+
# FLAT_* instructions "look at the per-workitem address and determine for each
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# work item if the target memory address is in global, private or scratch
274+
# memory" (RDNA2 ISA)
275+
# GCN-LABEL: name: hazard_lds_branch_flat
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# GCN: bb.1:
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# GFX10-NEXT: S_WAITCNT_VSCNT undef $sgpr_null, 0
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# GCN-NEXT: FLAT_LOAD_DWORD
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---
276-
name: no_hazard_lds_branch_flat
280+
name: hazard_lds_branch_flat
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body: |
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bb.0:
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successors: %bb.1

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