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Update tests after rebase
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‎llvm/test/Transforms/LoopVectorize/AArch64/conditional-branches-cost.ll‎

Lines changed: 65 additions & 185 deletions
Original file line numberDiff line numberDiff line change
@@ -609,185 +609,65 @@ exit:
609609
}
610610

611611
define void @low_trip_count_fold_tail_scalarized_store(ptr %dst) {
612-
; DEFAULT-LABEL: define void @low_trip_count_fold_tail_scalarized_store(
613-
; DEFAULT-SAME: ptr [[DST:%.*]]) {
614-
; DEFAULT-NEXT: [[ENTRY:.*:]]
615-
; DEFAULT-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
616-
; DEFAULT: [[VECTOR_PH]]:
617-
; DEFAULT-NEXT: br label %[[VECTOR_BODY:.*]]
618-
; DEFAULT: [[VECTOR_BODY]]:
619-
; DEFAULT-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE14:.*]] ]
620-
; DEFAULT-NEXT: [[VEC_IND:%.*]] = phi <8 x i8> [ <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE14]] ]
621-
; DEFAULT-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i8
622-
; DEFAULT-NEXT: [[TMP1:%.*]] = icmp ule <8 x i8> [[VEC_IND]], splat (i8 6)
623-
; DEFAULT-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP1]], i32 0
624-
; DEFAULT-NEXT: br i1 [[TMP2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
625-
; DEFAULT: [[PRED_STORE_IF]]:
626-
; DEFAULT-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0
627-
; DEFAULT-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]]
628-
; DEFAULT-NEXT: [[TMP5:%.*]] = add i8 [[TMP0]], 0
629-
; DEFAULT-NEXT: store i8 [[TMP5]], ptr [[TMP4]], align 1
630-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE]]
631-
; DEFAULT: [[PRED_STORE_CONTINUE]]:
632-
; DEFAULT-NEXT: [[TMP6:%.*]] = extractelement <8 x i1> [[TMP1]], i32 1
633-
; DEFAULT-NEXT: br i1 [[TMP6]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
634-
; DEFAULT: [[PRED_STORE_IF1]]:
635-
; DEFAULT-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1
636-
; DEFAULT-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]]
637-
; DEFAULT-NEXT: [[TMP9:%.*]] = add i8 [[TMP0]], 1
638-
; DEFAULT-NEXT: store i8 [[TMP9]], ptr [[TMP8]], align 1
639-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE2]]
640-
; DEFAULT: [[PRED_STORE_CONTINUE2]]:
641-
; DEFAULT-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP1]], i32 2
642-
; DEFAULT-NEXT: br i1 [[TMP10]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
643-
; DEFAULT: [[PRED_STORE_IF3]]:
644-
; DEFAULT-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 2
645-
; DEFAULT-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]]
646-
; DEFAULT-NEXT: [[TMP13:%.*]] = add i8 [[TMP0]], 2
647-
; DEFAULT-NEXT: store i8 [[TMP13]], ptr [[TMP12]], align 1
648-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE4]]
649-
; DEFAULT: [[PRED_STORE_CONTINUE4]]:
650-
; DEFAULT-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP1]], i32 3
651-
; DEFAULT-NEXT: br i1 [[TMP14]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
652-
; DEFAULT: [[PRED_STORE_IF5]]:
653-
; DEFAULT-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 3
654-
; DEFAULT-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP15]]
655-
; DEFAULT-NEXT: [[TMP17:%.*]] = add i8 [[TMP0]], 3
656-
; DEFAULT-NEXT: store i8 [[TMP17]], ptr [[TMP16]], align 1
657-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE6]]
658-
; DEFAULT: [[PRED_STORE_CONTINUE6]]:
659-
; DEFAULT-NEXT: [[TMP18:%.*]] = extractelement <8 x i1> [[TMP1]], i32 4
660-
; DEFAULT-NEXT: br i1 [[TMP18]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]]
661-
; DEFAULT: [[PRED_STORE_IF7]]:
662-
; DEFAULT-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 4
663-
; DEFAULT-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP19]]
664-
; DEFAULT-NEXT: [[TMP21:%.*]] = add i8 [[TMP0]], 4
665-
; DEFAULT-NEXT: store i8 [[TMP21]], ptr [[TMP20]], align 1
666-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE8]]
667-
; DEFAULT: [[PRED_STORE_CONTINUE8]]:
668-
; DEFAULT-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP1]], i32 5
669-
; DEFAULT-NEXT: br i1 [[TMP22]], label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]]
670-
; DEFAULT: [[PRED_STORE_IF9]]:
671-
; DEFAULT-NEXT: [[TMP23:%.*]] = add i64 [[INDEX]], 5
672-
; DEFAULT-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP23]]
673-
; DEFAULT-NEXT: [[TMP25:%.*]] = add i8 [[TMP0]], 5
674-
; DEFAULT-NEXT: store i8 [[TMP25]], ptr [[TMP24]], align 1
675-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE10]]
676-
; DEFAULT: [[PRED_STORE_CONTINUE10]]:
677-
; DEFAULT-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP1]], i32 6
678-
; DEFAULT-NEXT: br i1 [[TMP26]], label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12:.*]]
679-
; DEFAULT: [[PRED_STORE_IF11]]:
680-
; DEFAULT-NEXT: [[TMP27:%.*]] = add i64 [[INDEX]], 6
681-
; DEFAULT-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP27]]
682-
; DEFAULT-NEXT: [[TMP29:%.*]] = add i8 [[TMP0]], 6
683-
; DEFAULT-NEXT: store i8 [[TMP29]], ptr [[TMP28]], align 1
684-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE12]]
685-
; DEFAULT: [[PRED_STORE_CONTINUE12]]:
686-
; DEFAULT-NEXT: [[TMP30:%.*]] = extractelement <8 x i1> [[TMP1]], i32 7
687-
; DEFAULT-NEXT: br i1 [[TMP30]], label %[[PRED_STORE_IF13:.*]], label %[[PRED_STORE_CONTINUE14]]
688-
; DEFAULT: [[PRED_STORE_IF13]]:
689-
; DEFAULT-NEXT: [[TMP31:%.*]] = add i64 [[INDEX]], 7
690-
; DEFAULT-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP31]]
691-
; DEFAULT-NEXT: [[TMP33:%.*]] = add i8 [[TMP0]], 7
692-
; DEFAULT-NEXT: store i8 [[TMP33]], ptr [[TMP32]], align 1
693-
; DEFAULT-NEXT: br label %[[PRED_STORE_CONTINUE14]]
694-
; DEFAULT: [[PRED_STORE_CONTINUE14]]:
695-
; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
696-
; DEFAULT-NEXT: [[VEC_IND_NEXT]] = add <8 x i8> [[VEC_IND]], splat (i8 8)
697-
; DEFAULT-NEXT: br i1 true, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP24:![0-9]+]]
698-
; DEFAULT: [[MIDDLE_BLOCK]]:
699-
; DEFAULT-NEXT: br [[EXIT:label %.*]]
700-
; DEFAULT: [[SCALAR_PH]]:
701-
;
702-
; PRED-LABEL: define void @low_trip_count_fold_tail_scalarized_store(
703-
; PRED-SAME: ptr [[DST:%.*]]) {
704-
; PRED-NEXT: [[ENTRY:.*:]]
705-
; PRED-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
706-
; PRED: [[VECTOR_PH]]:
707-
; PRED-NEXT: br label %[[VECTOR_BODY:.*]]
708-
; PRED: [[VECTOR_BODY]]:
709-
; PRED-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[PRED_STORE_CONTINUE14:.*]] ]
710-
; PRED-NEXT: [[VEC_IND:%.*]] = phi <8 x i8> [ <i8 0, i8 1, i8 2, i8 3, i8 4, i8 5, i8 6, i8 7>, %[[VECTOR_PH]] ], [ [[VEC_IND_NEXT:%.*]], %[[PRED_STORE_CONTINUE14]] ]
711-
; PRED-NEXT: [[TMP0:%.*]] = trunc i64 [[INDEX]] to i8
712-
; PRED-NEXT: [[TMP1:%.*]] = icmp ule <8 x i8> [[VEC_IND]], splat (i8 6)
713-
; PRED-NEXT: [[TMP2:%.*]] = extractelement <8 x i1> [[TMP1]], i32 0
714-
; PRED-NEXT: br i1 [[TMP2]], label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
715-
; PRED: [[PRED_STORE_IF]]:
716-
; PRED-NEXT: [[TMP3:%.*]] = add i64 [[INDEX]], 0
717-
; PRED-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP3]]
718-
; PRED-NEXT: [[TMP5:%.*]] = add i8 [[TMP0]], 0
719-
; PRED-NEXT: store i8 [[TMP5]], ptr [[TMP4]], align 1
720-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE]]
721-
; PRED: [[PRED_STORE_CONTINUE]]:
722-
; PRED-NEXT: [[TMP6:%.*]] = extractelement <8 x i1> [[TMP1]], i32 1
723-
; PRED-NEXT: br i1 [[TMP6]], label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
724-
; PRED: [[PRED_STORE_IF1]]:
725-
; PRED-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], 1
726-
; PRED-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP7]]
727-
; PRED-NEXT: [[TMP9:%.*]] = add i8 [[TMP0]], 1
728-
; PRED-NEXT: store i8 [[TMP9]], ptr [[TMP8]], align 1
729-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE2]]
730-
; PRED: [[PRED_STORE_CONTINUE2]]:
731-
; PRED-NEXT: [[TMP10:%.*]] = extractelement <8 x i1> [[TMP1]], i32 2
732-
; PRED-NEXT: br i1 [[TMP10]], label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
733-
; PRED: [[PRED_STORE_IF3]]:
734-
; PRED-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], 2
735-
; PRED-NEXT: [[TMP12:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP11]]
736-
; PRED-NEXT: [[TMP13:%.*]] = add i8 [[TMP0]], 2
737-
; PRED-NEXT: store i8 [[TMP13]], ptr [[TMP12]], align 1
738-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE4]]
739-
; PRED: [[PRED_STORE_CONTINUE4]]:
740-
; PRED-NEXT: [[TMP14:%.*]] = extractelement <8 x i1> [[TMP1]], i32 3
741-
; PRED-NEXT: br i1 [[TMP14]], label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
742-
; PRED: [[PRED_STORE_IF5]]:
743-
; PRED-NEXT: [[TMP15:%.*]] = add i64 [[INDEX]], 3
744-
; PRED-NEXT: [[TMP16:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP15]]
745-
; PRED-NEXT: [[TMP17:%.*]] = add i8 [[TMP0]], 3
746-
; PRED-NEXT: store i8 [[TMP17]], ptr [[TMP16]], align 1
747-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE6]]
748-
; PRED: [[PRED_STORE_CONTINUE6]]:
749-
; PRED-NEXT: [[TMP18:%.*]] = extractelement <8 x i1> [[TMP1]], i32 4
750-
; PRED-NEXT: br i1 [[TMP18]], label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]]
751-
; PRED: [[PRED_STORE_IF7]]:
752-
; PRED-NEXT: [[TMP19:%.*]] = add i64 [[INDEX]], 4
753-
; PRED-NEXT: [[TMP20:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP19]]
754-
; PRED-NEXT: [[TMP21:%.*]] = add i8 [[TMP0]], 4
755-
; PRED-NEXT: store i8 [[TMP21]], ptr [[TMP20]], align 1
756-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE8]]
757-
; PRED: [[PRED_STORE_CONTINUE8]]:
758-
; PRED-NEXT: [[TMP22:%.*]] = extractelement <8 x i1> [[TMP1]], i32 5
759-
; PRED-NEXT: br i1 [[TMP22]], label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]]
760-
; PRED: [[PRED_STORE_IF9]]:
761-
; PRED-NEXT: [[TMP23:%.*]] = add i64 [[INDEX]], 5
762-
; PRED-NEXT: [[TMP24:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP23]]
763-
; PRED-NEXT: [[TMP25:%.*]] = add i8 [[TMP0]], 5
764-
; PRED-NEXT: store i8 [[TMP25]], ptr [[TMP24]], align 1
765-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE10]]
766-
; PRED: [[PRED_STORE_CONTINUE10]]:
767-
; PRED-NEXT: [[TMP26:%.*]] = extractelement <8 x i1> [[TMP1]], i32 6
768-
; PRED-NEXT: br i1 [[TMP26]], label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12:.*]]
769-
; PRED: [[PRED_STORE_IF11]]:
770-
; PRED-NEXT: [[TMP27:%.*]] = add i64 [[INDEX]], 6
771-
; PRED-NEXT: [[TMP28:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP27]]
772-
; PRED-NEXT: [[TMP29:%.*]] = add i8 [[TMP0]], 6
773-
; PRED-NEXT: store i8 [[TMP29]], ptr [[TMP28]], align 1
774-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE12]]
775-
; PRED: [[PRED_STORE_CONTINUE12]]:
776-
; PRED-NEXT: [[TMP30:%.*]] = extractelement <8 x i1> [[TMP1]], i32 7
777-
; PRED-NEXT: br i1 [[TMP30]], label %[[PRED_STORE_IF13:.*]], label %[[PRED_STORE_CONTINUE14]]
778-
; PRED: [[PRED_STORE_IF13]]:
779-
; PRED-NEXT: [[TMP31:%.*]] = add i64 [[INDEX]], 7
780-
; PRED-NEXT: [[TMP32:%.*]] = getelementptr i8, ptr [[DST]], i64 [[TMP31]]
781-
; PRED-NEXT: [[TMP33:%.*]] = add i8 [[TMP0]], 7
782-
; PRED-NEXT: store i8 [[TMP33]], ptr [[TMP32]], align 1
783-
; PRED-NEXT: br label %[[PRED_STORE_CONTINUE14]]
784-
; PRED: [[PRED_STORE_CONTINUE14]]:
785-
; PRED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
786-
; PRED-NEXT: [[VEC_IND_NEXT]] = add <8 x i8> [[VEC_IND]], splat (i8 8)
787-
; PRED-NEXT: br i1 true, label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP6:![0-9]+]]
788-
; PRED: [[MIDDLE_BLOCK]]:
789-
; PRED-NEXT: br [[EXIT:label %.*]]
790-
; PRED: [[SCALAR_PH]]:
612+
; COMMON-LABEL: define void @low_trip_count_fold_tail_scalarized_store(
613+
; COMMON-SAME: ptr [[DST:%.*]]) {
614+
; COMMON-NEXT: [[ENTRY:.*:]]
615+
; COMMON-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_PH:.*]]
616+
; COMMON: [[VECTOR_PH]]:
617+
; COMMON-NEXT: br label %[[VECTOR_BODY:.*]]
618+
; COMMON: [[VECTOR_BODY]]:
619+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF:.*]], label %[[PRED_STORE_CONTINUE:.*]]
620+
; COMMON: [[PRED_STORE_IF]]:
621+
; COMMON-NEXT: [[TMP0:%.*]] = getelementptr i8, ptr [[DST]], i64 0
622+
; COMMON-NEXT: store i8 0, ptr [[TMP0]], align 1
623+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE]]
624+
; COMMON: [[PRED_STORE_CONTINUE]]:
625+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF1:.*]], label %[[PRED_STORE_CONTINUE2:.*]]
626+
; COMMON: [[PRED_STORE_IF1]]:
627+
; COMMON-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[DST]], i64 1
628+
; COMMON-NEXT: store i8 1, ptr [[TMP1]], align 1
629+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE2]]
630+
; COMMON: [[PRED_STORE_CONTINUE2]]:
631+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF3:.*]], label %[[PRED_STORE_CONTINUE4:.*]]
632+
; COMMON: [[PRED_STORE_IF3]]:
633+
; COMMON-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[DST]], i64 2
634+
; COMMON-NEXT: store i8 2, ptr [[TMP2]], align 1
635+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE4]]
636+
; COMMON: [[PRED_STORE_CONTINUE4]]:
637+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF5:.*]], label %[[PRED_STORE_CONTINUE6:.*]]
638+
; COMMON: [[PRED_STORE_IF5]]:
639+
; COMMON-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[DST]], i64 3
640+
; COMMON-NEXT: store i8 3, ptr [[TMP3]], align 1
641+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE6]]
642+
; COMMON: [[PRED_STORE_CONTINUE6]]:
643+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF7:.*]], label %[[PRED_STORE_CONTINUE8:.*]]
644+
; COMMON: [[PRED_STORE_IF7]]:
645+
; COMMON-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[DST]], i64 4
646+
; COMMON-NEXT: store i8 4, ptr [[TMP4]], align 1
647+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE8]]
648+
; COMMON: [[PRED_STORE_CONTINUE8]]:
649+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF9:.*]], label %[[PRED_STORE_CONTINUE10:.*]]
650+
; COMMON: [[PRED_STORE_IF9]]:
651+
; COMMON-NEXT: [[TMP5:%.*]] = getelementptr i8, ptr [[DST]], i64 5
652+
; COMMON-NEXT: store i8 5, ptr [[TMP5]], align 1
653+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE10]]
654+
; COMMON: [[PRED_STORE_CONTINUE10]]:
655+
; COMMON-NEXT: br i1 true, label %[[PRED_STORE_IF11:.*]], label %[[PRED_STORE_CONTINUE12:.*]]
656+
; COMMON: [[PRED_STORE_IF11]]:
657+
; COMMON-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[DST]], i64 6
658+
; COMMON-NEXT: store i8 6, ptr [[TMP6]], align 1
659+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE12]]
660+
; COMMON: [[PRED_STORE_CONTINUE12]]:
661+
; COMMON-NEXT: br i1 false, label %[[PRED_STORE_IF13:.*]], label %[[PRED_STORE_CONTINUE14:.*]]
662+
; COMMON: [[PRED_STORE_IF13]]:
663+
; COMMON-NEXT: [[TMP7:%.*]] = getelementptr i8, ptr [[DST]], i64 7
664+
; COMMON-NEXT: store i8 7, ptr [[TMP7]], align 1
665+
; COMMON-NEXT: br label %[[PRED_STORE_CONTINUE14]]
666+
; COMMON: [[PRED_STORE_CONTINUE14]]:
667+
; COMMON-NEXT: br label %[[MIDDLE_BLOCK:.*]]
668+
; COMMON: [[MIDDLE_BLOCK]]:
669+
; COMMON-NEXT: br [[EXIT:label %.*]]
670+
; COMMON: [[SCALAR_PH]]:
791671
;
792672
entry:
793673
br label %loop
@@ -986,7 +866,7 @@ define void @test_conditional_interleave_group (ptr noalias %src.1, ptr noalias
986866
; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
987867
; DEFAULT-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8)
988868
; DEFAULT-NEXT: [[TMP80:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
989-
; DEFAULT-NEXT: br i1 [[TMP80]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP26:![0-9]+]]
869+
; DEFAULT-NEXT: br i1 [[TMP80]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP25:![0-9]+]]
990870
; DEFAULT: [[MIDDLE_BLOCK]]:
991871
; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]
992872
; DEFAULT-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]
@@ -1177,7 +1057,7 @@ define void @test_conditional_interleave_group (ptr noalias %src.1, ptr noalias
11771057
; PRED-NEXT: [[TMP84:%.*]] = extractelement <8 x i1> [[ACTIVE_LANE_MASK_NEXT]], i32 0
11781058
; PRED-NEXT: [[TMP85:%.*]] = xor i1 [[TMP84]], true
11791059
; PRED-NEXT: [[VEC_IND_NEXT]] = add <8 x i64> [[VEC_IND]], splat (i64 8)
1180-
; PRED-NEXT: br i1 [[TMP85]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP8:![0-9]+]]
1060+
; PRED-NEXT: br i1 [[TMP85]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP7:![0-9]+]]
11811061
; PRED: [[MIDDLE_BLOCK]]:
11821062
; PRED-NEXT: br [[EXIT:label %.*]]
11831063
; PRED: [[SCALAR_PH]]:
@@ -1235,7 +1115,7 @@ define void @redundant_branch_and_tail_folding(ptr %dst, i1 %c) {
12351115
; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 8
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; DEFAULT-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[STEP_ADD]], splat (i64 4)
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; DEFAULT-NEXT: [[TMP3:%.*]] = icmp eq i64 [[INDEX_NEXT]], 16
1238-
; DEFAULT-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP28:![0-9]+]]
1118+
; DEFAULT-NEXT: br i1 [[TMP3]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP27:![0-9]+]]
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; DEFAULT: [[MIDDLE_BLOCK]]:
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; DEFAULT-NEXT: br label %[[SCALAR_PH]]
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; DEFAULT: [[SCALAR_PH]]:
@@ -1283,7 +1163,7 @@ define void @redundant_branch_and_tail_folding(ptr %dst, i1 %c) {
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; PRED-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 4
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; PRED-NEXT: [[VEC_IND_NEXT]] = add <4 x i64> [[VEC_IND]], splat (i64 4)
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; PRED-NEXT: [[TMP11:%.*]] = icmp eq i64 [[INDEX_NEXT]], 24
1286-
; PRED-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP10:![0-9]+]]
1166+
; PRED-NEXT: br i1 [[TMP11]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP9:![0-9]+]]
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; PRED: [[MIDDLE_BLOCK]]:
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; PRED-NEXT: br [[EXIT:label %.*]]
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; PRED: [[SCALAR_PH]]:
@@ -1409,7 +1289,7 @@ define void @pred_udiv_select_cost(ptr %A, ptr %B, ptr %C, i64 %n, i8 %y) #1 {
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; DEFAULT-NEXT: store <vscale x 4 x i8> [[TMP23]], ptr [[TMP24]], align 1
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; DEFAULT-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], [[TMP9]]
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; DEFAULT-NEXT: [[TMP25:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
1412-
; DEFAULT-NEXT: br i1 [[TMP25]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP30:![0-9]+]]
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; DEFAULT-NEXT: br i1 [[TMP25]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP29:![0-9]+]]
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; DEFAULT: [[MIDDLE_BLOCK]]:
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; DEFAULT-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]
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; DEFAULT-NEXT: br i1 [[CMP_N]], [[EXIT:label %.*]], label %[[SCALAR_PH]]
@@ -1471,7 +1351,7 @@ define void @pred_udiv_select_cost(ptr %A, ptr %B, ptr %C, i64 %n, i8 %y) #1 {
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; PRED-NEXT: [[ACTIVE_LANE_MASK_NEXT]] = call <vscale x 16 x i1> @llvm.get.active.lane.mask.nxv16i1.i64(i64 [[INDEX]], i64 [[TMP11]])
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; PRED-NEXT: [[TMP28:%.*]] = extractelement <vscale x 16 x i1> [[ACTIVE_LANE_MASK_NEXT]], i32 0
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; PRED-NEXT: [[TMP29:%.*]] = xor i1 [[TMP28]], true
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; PRED-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP12:![0-9]+]]
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; PRED-NEXT: br i1 [[TMP29]], label %[[MIDDLE_BLOCK:.*]], label %[[VECTOR_BODY]], !llvm.loop [[LOOP11:![0-9]+]]
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; PRED: [[MIDDLE_BLOCK]]:
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; PRED-NEXT: br [[EXIT:label %.*]]
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; PRED: [[SCALAR_PH]]:

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