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!fixup add early exit, handle case with STy being int
1 parent 324d15f commit d943379

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3 files changed

+121
-18
lines changed

3 files changed

+121
-18
lines changed

‎llvm/lib/Transforms/Utils/ScalarEvolutionExpander.cpp‎

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1237,6 +1237,8 @@ Value *SCEVExpander::tryToReuseLCSSAPhi(const SCEVAddRecExpr *S) {
12371237
if (!SE.isSCEVable(PN.getType()))
12381238
continue;
12391239
auto *ExitSCEV = SE.getSCEV(&PN);
1240+
if (!isa<SCEVAddRecExpr>(ExitSCEV))
1241+
continue;
12401242
Type *PhiTy = PN.getType();
12411243
if (STy->isIntegerTy() && PhiTy->isPointerTy())
12421244
ExitSCEV = SE.getPtrToIntExpr(ExitSCEV, STy);
@@ -1252,10 +1254,14 @@ Value *SCEVExpander::tryToReuseLCSSAPhi(const SCEVAddRecExpr *S) {
12521254
if (!isa<SCEVConstant, SCEVUnknown>(Op))
12531255
continue;
12541256

1257+
assert(Diff->getType()->isIntegerTy() && "difference must be of integer type");
12551258
Value *DiffV = expand(Diff);
12561259
Value *BaseV = &PN;
1257-
if (DiffV->getType()->isIntegerTy() && PhiTy->isPointerTy())
1258-
return Builder.CreatePtrAdd(BaseV, DiffV);
1260+
if (PhiTy->isPointerTy()) {
1261+
if (STy->isPointerTy())
1262+
return Builder.CreatePtrAdd(BaseV, DiffV);
1263+
BaseV = Builder.CreatePtrToInt(BaseV, DiffV->getType());
1264+
}
12591265
return Builder.CreateAdd(BaseV, DiffV);
12601266
}
12611267

‎llvm/test/Transforms/LoopIdiom/reuse-lcssa-phi-scev-expansion.ll‎

Lines changed: 98 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,98 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
2+
; RUN: opt -p loop-idiom -S %s | FileCheck %s
3+
4+
declare void @foo()
5+
declare void @bar()
6+
7+
define void @scev_expand_ptrtoint(i8 %x, ptr %start) {
8+
; CHECK-LABEL: define void @scev_expand_ptrtoint(
9+
; CHECK-SAME: i8 [[X:%.*]], ptr [[START:%.*]]) {
10+
; CHECK-NEXT: [[ENTRY:.*]]:
11+
; CHECK-NEXT: [[START1:%.*]] = ptrtoint ptr [[START]] to i64
12+
; CHECK-NEXT: br label %[[LOOP_1_HEADER:.*]]
13+
; CHECK: [[LOOP_1_HEADER]]:
14+
; CHECK-NEXT: [[PTR_IV_1:%.*]] = phi ptr [ [[START]], %[[ENTRY]] ], [ [[PTR_IV_1_NEXT:%.*]], %[[LOOP_1_LATCH:.*]] ]
15+
; CHECK-NEXT: [[C:%.*]] = icmp ule i8 [[X]], 1
16+
; CHECK-NEXT: br i1 [[C]], label %[[LOOP_1_LATCH]], label %[[MIDDLE:.*]]
17+
; CHECK: [[LOOP_1_LATCH]]:
18+
; CHECK-NEXT: [[PTR_IV_1_NEXT]] = getelementptr i8, ptr [[PTR_IV_1]], i64 1
19+
; CHECK-NEXT: br label %[[LOOP_1_HEADER]]
20+
; CHECK: [[MIDDLE]]:
21+
; CHECK-NEXT: [[PTR_IV_1_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1]], %[[LOOP_1_HEADER]] ]
22+
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i8 [[X]], 0
23+
; CHECK-NEXT: [[CMP_EXT:%.*]] = zext i1 [[CMP]] to i64
24+
; CHECK-NEXT: [[GEP_START:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA]], i64 [[CMP_EXT]]
25+
; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]]
26+
; CHECK: [[LOOP_2_HEADER]]:
27+
; CHECK-NEXT: [[INDVAR:%.*]] = phi i64 [ [[INDVAR_NEXT:%.*]], %[[LOOP_2_LATCH:.*]] ], [ 0, %[[MIDDLE]] ]
28+
; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[GEP_START]], %[[MIDDLE]] ], [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ]
29+
; CHECK-NEXT: switch i8 [[X]], label %[[LOOP_2_LATCH]] [
30+
; CHECK-NEXT: i8 1, label %[[LOOP_3_PREHEADER:.*]]
31+
; CHECK-NEXT: i8 4, label %[[LOOP_3_PREHEADER]]
32+
; CHECK-NEXT: ]
33+
; CHECK: [[LOOP_3_PREHEADER]]:
34+
; CHECK-NEXT: [[INDVAR_LCSSA:%.*]] = phi i64 [ [[INDVAR]], %[[LOOP_2_HEADER]] ], [ [[INDVAR]], %[[LOOP_2_HEADER]] ]
35+
; CHECK-NEXT: [[PTR_IV_2_LCSSA:%.*]] = phi ptr [ [[PTR_IV_2]], %[[LOOP_2_HEADER]] ], [ [[PTR_IV_2]], %[[LOOP_2_HEADER]] ]
36+
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[START1]]
37+
; CHECK-NEXT: [[TMP1:%.*]] = ptrtoint ptr [[PTR_IV_1_LCSSA]] to i64
38+
; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP1]], [[TMP0]]
39+
; CHECK-NEXT: [[TMP3:%.*]] = add i64 [[TMP2]], 1
40+
; CHECK-NEXT: [[TMP4:%.*]] = add i64 [[CMP_EXT]], [[TMP3]]
41+
; CHECK-NEXT: [[TMP5:%.*]] = add i64 [[INDVAR_LCSSA]], [[TMP4]]
42+
; CHECK-NEXT: [[SCEVGEP:%.*]] = getelementptr i8, ptr [[START]], i64 [[TMP5]]
43+
; CHECK-NEXT: [[STRLEN:%.*]] = call i64 @strlen(ptr [[SCEVGEP]])
44+
; CHECK-NEXT: br label %[[LOOP_3:.*]]
45+
; CHECK: [[LOOP_2_LATCH]]:
46+
; CHECK-NEXT: [[PTR_IV_2_NEXT]] = getelementptr i8, ptr [[PTR_IV_2]], i64 1
47+
; CHECK-NEXT: [[INDVAR_NEXT]] = add i64 [[INDVAR]], 1
48+
; CHECK-NEXT: br label %[[LOOP_2_HEADER]]
49+
; CHECK: [[LOOP_3]]:
50+
; CHECK-NEXT: [[IV_3:%.*]] = phi i64 [ [[IV_3_NEXT:%.*]], %[[LOOP_3]] ], [ 1, %[[LOOP_3_PREHEADER]] ]
51+
; CHECK-NEXT: [[GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_2_LCSSA]], i64 [[IV_3]]
52+
; CHECK-NEXT: [[TMP6:%.*]] = load i8, ptr [[GEP]], align 1
53+
; CHECK-NEXT: [[EC:%.*]] = icmp eq i8 [[TMP6]], 0
54+
; CHECK-NEXT: [[IV_3_NEXT]] = add i64 [[IV_3]], 1
55+
; CHECK-NEXT: br i1 true, label %[[EXIT:.*]], label %[[LOOP_3]]
56+
; CHECK: [[EXIT]]:
57+
; CHECK-NEXT: ret void
58+
;
59+
entry:
60+
br label %loop.1.header
61+
62+
loop.1.header:
63+
%ptr.iv.1 = phi ptr [ %start, %entry ], [ %ptr.iv.1.next, %loop.1.latch ]
64+
%c = icmp ule i8 %x, 1
65+
br i1 %c, label %loop.1.latch, label %middle
66+
67+
loop.1.latch:
68+
%ptr.iv.1.next = getelementptr i8, ptr %ptr.iv.1, i64 1
69+
br label %loop.1.header
70+
71+
middle:
72+
%cmp = icmp eq i8 %x, 0
73+
%cmp.ext = zext i1 %cmp to i64
74+
%gep.start = getelementptr i8, ptr %ptr.iv.1, i64 %cmp.ext
75+
br label %loop.2.header
76+
77+
loop.2.header:
78+
%ptr.iv.2 = phi ptr [ %gep.start, %middle ], [ %ptr.iv.2.next, %loop.2.latch ]
79+
switch i8 %x, label %loop.2.latch [
80+
i8 1, label %loop.3
81+
i8 4, label %loop.3
82+
]
83+
84+
loop.2.latch:
85+
%ptr.iv.2.next = getelementptr i8, ptr %ptr.iv.2, i64 1
86+
br label %loop.2.header
87+
88+
loop.3:
89+
%iv.3 = phi i64 [ 1, %loop.2.header ], [ 1, %loop.2.header ], [ %iv.3.next, %loop.3 ]
90+
%gep = getelementptr i8, ptr %ptr.iv.2, i64 %iv.3
91+
%1 = load i8, ptr %gep, align 1
92+
%ec = icmp eq i8 %1, 0
93+
%iv.3.next = add i64 %iv.3, 1
94+
br i1 %ec, label %exit, label %loop.3
95+
96+
exit:
97+
ret void
98+
}

‎llvm/test/Transforms/LoopVectorize/reuse-lcssa-phi-scev-expansion.ll‎

Lines changed: 15 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -114,23 +114,22 @@ define void @runtime_checks_ptr_inductions(ptr %dst.1, ptr %dst.2, i1 %c) {
114114
; CHECK-NEXT: br i1 [[EC_1]], label %[[LOOP_2_HEADER_PREHEADER:.*]], label %[[LOOP_1]]
115115
; CHECK: [[LOOP_2_HEADER_PREHEADER]]:
116116
; CHECK-NEXT: [[SEL_DST_LCSSA1:%.*]] = phi ptr [ [[SEL_DST]], %[[LOOP_1]] ]
117-
; CHECK-NEXT: [[PTR_IV_1_LCSSA1:%.*]] = phi ptr [ [[PTR_IV_1]], %[[LOOP_1]] ]
117+
; CHECK-NEXT: [[PTR_IV_1_LCSSA:%.*]] = phi ptr [ [[PTR_IV_1]], %[[LOOP_1]] ]
118118
; CHECK-NEXT: [[SEL_DST_LCSSA:%.*]] = phi ptr [ [[SEL_DST]], %[[LOOP_1]] ]
119119
; CHECK-NEXT: [[SEL_DST_LCSSA12:%.*]] = ptrtoint ptr [[SEL_DST_LCSSA1]] to i64
120120
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
121121
; CHECK: [[VECTOR_MEMCHECK]]:
122-
; CHECK-NEXT: [[TMP2:%.*]] = mul i64 [[SEL_DST_LCSSA12]], -1
123-
; CHECK-NEXT: [[PTR_IV_1_LCSSA:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA1]], i64 [[TMP2]]
124122
; CHECK-NEXT: [[TMP0:%.*]] = ptrtoint ptr [[PTR_IV_1_LCSSA]] to i64
125-
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP0]], 2
123+
; CHECK-NEXT: [[TMP1:%.*]] = sub i64 [[TMP0]], [[SEL_DST_LCSSA12]]
124+
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP1]], 2
126125
; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
127126
; CHECK: [[VECTOR_PH]]:
128-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA1]], i64 1022
127+
; CHECK-NEXT: [[TMP2:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA]], i64 1022
129128
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[SEL_DST_LCSSA]], i64 1022
130129
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
131130
; CHECK: [[VECTOR_BODY]]:
132131
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
133-
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA1]], i64 [[INDEX]]
132+
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_1_LCSSA]], i64 [[INDEX]]
134133
; CHECK-NEXT: [[NEXT_GEP4:%.*]] = getelementptr i8, ptr [[SEL_DST_LCSSA]], i64 [[INDEX]]
135134
; CHECK-NEXT: [[TMP4:%.*]] = getelementptr i8, ptr [[NEXT_GEP4]], i32 0
136135
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i8>, ptr [[TMP4]], align 1
@@ -143,13 +142,13 @@ define void @runtime_checks_ptr_inductions(ptr %dst.1, ptr %dst.2, i1 %c) {
143142
; CHECK-NEXT: br label %[[SCALAR_PH]]
144143
; CHECK: [[SCALAR_PH]]:
145144
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i32 [ 1023, %[[MIDDLE_BLOCK]] ], [ 1, %[[LOOP_2_HEADER_PREHEADER]] ], [ 1, %[[VECTOR_MEMCHECK]] ]
146-
; CHECK-NEXT: [[BC_RESUME_VAL5:%.*]] = phi ptr [ [[TMP1]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_LCSSA1]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[PTR_IV_1_LCSSA1]], %[[VECTOR_MEMCHECK]] ]
147-
; CHECK-NEXT: [[BC_RESUME_VAL6:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[SEL_DST_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[SEL_DST_LCSSA]], %[[VECTOR_MEMCHECK]] ]
145+
; CHECK-NEXT: [[BC_RESUME_VAL4:%.*]] = phi ptr [ [[TMP2]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_1_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[PTR_IV_1_LCSSA]], %[[VECTOR_MEMCHECK]] ]
146+
; CHECK-NEXT: [[BC_RESUME_VAL5:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[SEL_DST_LCSSA]], %[[LOOP_2_HEADER_PREHEADER]] ], [ [[SEL_DST_LCSSA]], %[[VECTOR_MEMCHECK]] ]
148147
; CHECK-NEXT: br label %[[LOOP_2_HEADER:.*]]
149148
; CHECK: [[LOOP_2_HEADER]]:
150149
; CHECK-NEXT: [[IV:%.*]] = phi i32 [ [[DEC7:%.*]], %[[LOOP_2_LATCH:.*]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]
151-
; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ]
152-
; CHECK-NEXT: [[PTR_IV_3:%.*]] = phi ptr [ [[PTR_IV_3_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL6]], %[[SCALAR_PH]] ]
150+
; CHECK-NEXT: [[PTR_IV_2:%.*]] = phi ptr [ [[PTR_IV_2_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL4]], %[[SCALAR_PH]] ]
151+
; CHECK-NEXT: [[PTR_IV_3:%.*]] = phi ptr [ [[PTR_IV_3_NEXT:%.*]], %[[LOOP_2_LATCH]] ], [ [[BC_RESUME_VAL5]], %[[SCALAR_PH]] ]
153152
; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i32 [[IV]], 1024
154153
; CHECK-NEXT: br i1 [[EC_2]], label %[[EXIT:.*]], label %[[LOOP_2_LATCH]]
155154
; CHECK: [[LOOP_2_LATCH]]:
@@ -305,22 +304,22 @@ define void @expand_diff_neg_ptrtoint_expr(ptr %src, ptr %start) {
305304
; CHECK-NEXT: [[EC_2:%.*]] = icmp eq i64 [[IV_NEXT_1]], 32
306305
; CHECK-NEXT: br i1 [[EC_2]], label %[[LOOP_3_PREHEADER:.*]], label %[[LOOP_2]]
307306
; CHECK: [[LOOP_3_PREHEADER]]:
308-
; CHECK-NEXT: [[PTR_IV_2_NEXT_LCSSA:%.*]] = phi ptr [ [[PTR_IV_2_NEXT]], %[[LOOP_2]] ]
307+
; CHECK-NEXT: [[TMP1:%.*]] = phi ptr [ [[PTR_IV_2_NEXT]], %[[LOOP_2]] ]
309308
; CHECK-NEXT: br i1 false, label %[[SCALAR_PH:.*]], label %[[VECTOR_MEMCHECK:.*]]
310309
; CHECK: [[VECTOR_MEMCHECK]]:
311310
; CHECK-NEXT: [[TMP0:%.*]] = sub i64 0, [[SRC2]]
312-
; CHECK-NEXT: [[TMP1:%.*]] = getelementptr i8, ptr [[PTR_IV_2_NEXT_LCSSA]], i64 [[TMP0]]
313311
; CHECK-NEXT: [[TMP5:%.*]] = ptrtoint ptr [[TMP1]] to i64
314-
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP5]], 16
312+
; CHECK-NEXT: [[TMP2:%.*]] = add i64 [[TMP5]], [[TMP0]]
313+
; CHECK-NEXT: [[DIFF_CHECK:%.*]] = icmp ult i64 [[TMP2]], 16
315314
; CHECK-NEXT: br i1 [[DIFF_CHECK]], label %[[SCALAR_PH]], label %[[VECTOR_PH:.*]]
316315
; CHECK: [[VECTOR_PH]]:
317-
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr i8, ptr [[PTR_IV_2_NEXT_LCSSA]], i64 -16
316+
; CHECK-NEXT: [[TMP3:%.*]] = getelementptr i8, ptr [[TMP1]], i64 -16
318317
; CHECK-NEXT: br label %[[VECTOR_BODY:.*]]
319318
; CHECK: [[VECTOR_BODY]]:
320319
; CHECK-NEXT: [[INDEX:%.*]] = phi i64 [ 0, %[[VECTOR_PH]] ], [ [[INDEX_NEXT:%.*]], %[[VECTOR_BODY]] ]
321320
; CHECK-NEXT: [[OFFSET_IDX:%.*]] = add i64 1, [[INDEX]]
322321
; CHECK-NEXT: [[OFFSET_IDX5:%.*]] = mul i64 [[INDEX]], 8
323-
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[PTR_IV_2_NEXT_LCSSA]], i64 [[OFFSET_IDX5]]
322+
; CHECK-NEXT: [[NEXT_GEP:%.*]] = getelementptr i8, ptr [[TMP1]], i64 [[OFFSET_IDX5]]
324323
; CHECK-NEXT: [[TMP7:%.*]] = add i64 [[OFFSET_IDX]], -1
325324
; CHECK-NEXT: [[TMP8:%.*]] = getelementptr double, ptr [[SRC]], i64 [[TMP7]]
326325
; CHECK-NEXT: [[TMP9:%.*]] = getelementptr i64, ptr [[TMP8]], i32 0
@@ -334,7 +333,7 @@ define void @expand_diff_neg_ptrtoint_expr(ptr %src, ptr %start) {
334333
; CHECK-NEXT: br i1 false, label %[[EXIT:.*]], label %[[SCALAR_PH]]
335334
; CHECK: [[SCALAR_PH]]:
336335
; CHECK-NEXT: [[BC_RESUME_VAL:%.*]] = phi i64 [ -1, %[[MIDDLE_BLOCK]] ], [ 1, %[[LOOP_3_PREHEADER]] ], [ 1, %[[VECTOR_MEMCHECK]] ]
337-
; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[TMP6]], %[[MIDDLE_BLOCK]] ], [ [[PTR_IV_2_NEXT_LCSSA]], %[[LOOP_3_PREHEADER]] ], [ [[PTR_IV_2_NEXT_LCSSA]], %[[VECTOR_MEMCHECK]] ]
336+
; CHECK-NEXT: [[BC_RESUME_VAL3:%.*]] = phi ptr [ [[TMP3]], %[[MIDDLE_BLOCK]] ], [ [[TMP1]], %[[LOOP_3_PREHEADER]] ], [ [[TMP1]], %[[VECTOR_MEMCHECK]] ]
338337
; CHECK-NEXT: br label %[[LOOP_3:.*]]
339338
; CHECK: [[LOOP_3]]:
340339
; CHECK-NEXT: [[IV_2:%.*]] = phi i64 [ [[IV_NEXT_2:%.*]], %[[LOOP_3]] ], [ [[BC_RESUME_VAL]], %[[SCALAR_PH]] ]

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