@@ -235,7 +235,7 @@ define arm_aapcs_vfpcc <8 x i16> @shuffle3_i16(<8 x i16> %src) {
235235; CHECK-LV-NEXT: vmov.f32 s7, s1
236236; CHECK-LV-NEXT: vmov q0, q1
237237; CHECK-LV-NEXT: bx lr
238-
238+ ;
239239; CHECK-LIS-LABEL: shuffle3_i16:
240240; CHECK-LIS: @ %bb.0: @ %entry
241241; CHECK-LIS-NEXT: vmov q1, q0
@@ -248,6 +248,7 @@ define arm_aapcs_vfpcc <8 x i16> @shuffle3_i16(<8 x i16> %src) {
248248; CHECK-LIS-NEXT: vmov.f32 s3, s5
249249; CHECK-LIS-NEXT: vins.f16 s1, s7
250250; CHECK-LIS-NEXT: bx lr
251+
251252entry:
252253 %out = shufflevector <8 x i16 > %src , <8 x i16 > undef , <8 x i32 > <i32 4 , i32 5 , i32 7 , i32 6 , i32 3 , i32 1 , i32 2 , i32 0 >
253254 ret <8 x i16 > %out
@@ -1170,7 +1171,7 @@ define arm_aapcs_vfpcc <8 x half> @shuffle3_f16(<8 x half> %src) {
11701171; CHECK-LV-NEXT: vmov.f32 s7, s1
11711172; CHECK-LV-NEXT: vmov q0, q1
11721173; CHECK-LV-NEXT: bx lr
1173-
1174+ ;
11741175; CHECK-LIS-LABEL: shuffle3_f16:
11751176; CHECK-LIS: @ %bb.0: @ %entry
11761177; CHECK-LIS-NEXT: vmov q1, q0
@@ -1183,6 +1184,7 @@ define arm_aapcs_vfpcc <8 x half> @shuffle3_f16(<8 x half> %src) {
11831184; CHECK-LIS-NEXT: vmov.f32 s3, s5
11841185; CHECK-LIS-NEXT: vins.f16 s1, s7
11851186; CHECK-LIS-NEXT: bx lr
1187+
11861188entry:
11871189 %out = shufflevector <8 x half > %src , <8 x half > undef , <8 x i32 > <i32 4 , i32 5 , i32 7 , i32 6 , i32 3 , i32 1 , i32 2 , i32 0 >
11881190 ret <8 x half > %out
@@ -1514,7 +1516,7 @@ define arm_aapcs_vfpcc <8 x double> @shuffle9_f64(<4 x double> %src1, <4 x doubl
15141516; CHECK-LV-NEXT: vmov q1, q5
15151517; CHECK-LV-NEXT: vpop {d8, d9, d10, d11}
15161518; CHECK-LV-NEXT: bx lr
1517-
1519+ ;
15181520; CHECK-LIS-LABEL: shuffle9_f64:
15191521; CHECK-LIS: @ %bb.0: @ %entry
15201522; CHECK-LIS-NEXT: .vsave {d8, d9, d10, d11}
@@ -1534,6 +1536,7 @@ define arm_aapcs_vfpcc <8 x double> @shuffle9_f64(<4 x double> %src1, <4 x doubl
15341536; CHECK-LIS-NEXT: vmov q1, q5
15351537; CHECK-LIS-NEXT: vpop {d8, d9, d10, d11}
15361538; CHECK-LIS-NEXT: bx lr
1539+
15371540entry:
15381541 %out = shufflevector <4 x double > %src1 , <4 x double > %src2 , <8 x i32 > <i32 0 , i32 4 , i32 1 , i32 5 , i32 2 , i32 6 , i32 3 , i32 7 >
15391542 ret <8 x double > %out
@@ -1627,7 +1630,7 @@ define arm_aapcs_vfpcc <8 x i64> @shuffle9_i64(<4 x i64> %src1, <4 x i64> %src2)
16271630; CHECK-LV-NEXT: vmov q1, q5
16281631; CHECK-LV-NEXT: vpop {d8, d9, d10, d11}
16291632; CHECK-LV-NEXT: bx lr
1630-
1633+ ;
16311634; CHECK-LIS-LABEL: shuffle9_i64:
16321635; CHECK-LIS: @ %bb.0: @ %entry
16331636; CHECK-LIS-NEXT: .vsave {d8, d9, d10, d11}
@@ -1647,6 +1650,7 @@ define arm_aapcs_vfpcc <8 x i64> @shuffle9_i64(<4 x i64> %src1, <4 x i64> %src2)
16471650; CHECK-LIS-NEXT: vmov q1, q5
16481651; CHECK-LIS-NEXT: vpop {d8, d9, d10, d11}
16491652; CHECK-LIS-NEXT: bx lr
1653+
16501654entry:
16511655 %out = shufflevector <4 x i64 > %src1 , <4 x i64 > %src2 , <8 x i32 > <i32 0 , i32 4 , i32 1 , i32 5 , i32 2 , i32 6 , i32 3 , i32 7 >
16521656 ret <8 x i64 > %out
@@ -1886,6 +1890,3 @@ entry:
18861890 ret double %res
18871891}
18881892
1889- ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
1890- ; CHECK-LIS: {{.*}}
1891- ; CHECK-LV: {{.*}}
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