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Adding dxil tests
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3 files changed

+87
-6
lines changed

3 files changed

+87
-6
lines changed

clang/lib/Sema/SemaSPIRV.cpp

Lines changed: 44 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -226,6 +226,50 @@ bool SemaSPIRV::CheckSPIRVBuiltinFunctionCall(const TargetInfo &TI,
226226
TheCall->setType(RetTy);
227227
break;
228228
}
229+
case SPIRV::BI__builtin_spirv_refract: {
230+
if (SemaRef.checkArgCount(TheCall, 3))
231+
return true;
232+
233+
ExprResult A = TheCall->getArg(0);
234+
QualType ArgTyA = A.get()->getType();
235+
auto *VTyA = ArgTyA->getAs<VectorType>();
236+
if (VTyA == nullptr) {
237+
SemaRef.Diag(A.get()->getBeginLoc(),
238+
diag::err_typecheck_convert_incompatible)
239+
<< ArgTyA
240+
<< SemaRef.Context.getVectorType(ArgTyA, 2, VectorKind::Generic) << 1
241+
<< 0 << 0;
242+
return true;
243+
}
244+
245+
ExprResult B = TheCall->getArg(1);
246+
QualType ArgTyB = B.get()->getType();
247+
auto *VTyB = ArgTyB->getAs<VectorType>();
248+
if (VTyB == nullptr) {
249+
SemaRef.Diag(B.get()->getBeginLoc(),
250+
diag::err_typecheck_convert_incompatible)
251+
<< ArgTyB
252+
<< SemaRef.Context.getVectorType(ArgTyB, 2, VectorKind::Generic) << 1
253+
<< 0 << 0;
254+
return true;
255+
}
256+
257+
ExprResult C = TheCall->getArg(2);
258+
QualType ArgTyC = C.get()->getType();
259+
if (!ArgTyC->hasFloatingRepresentation()) {
260+
SemaRef.Diag(C.get()->getBeginLoc(),
261+
diag::err_builtin_invalid_arg_type)
262+
<< 3 << /* scalar or vector */ 5 << /* no int */ 0 << /* fp */ 1
263+
<< ArgTyC;
264+
return true;
265+
}
266+
267+
QualType RetTy = ArgTyA;
268+
TheCall->setType(RetTy);
269+
assert(RetTy == ArgTyA);
270+
//assert(ArgTyB == ArgTyA);
271+
break;
272+
}
229273
case SPIRV::BI__builtin_spirv_reflect: {
230274
if (SemaRef.checkArgCount(TheCall, 2))
231275
return true;

clang/test/CodeGenHLSL/builtins/reflect.hlsl

Lines changed: 23 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,29 @@
88
// CHECK-LABEL: define noundef nofpclass(nan inf) half @_Z17test_reflect_halfDhDh(
99
// CHECK-SAME: half noundef nofpclass(nan inf) [[I:%.*]], half noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {
1010
// CHECK-NEXT: [[ENTRY:.*:]]
11-
// CHECK-NEXT: [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[I]], 0xH4000
12-
// CHECK-NEXT: [[TMP0:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[N]], [[N]]
13-
// CHECK-NEXT: [[MUL2_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP0]], [[MUL_I]]
14-
// CHECK-NEXT: [[SUB_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[I]], [[MUL2_I]]
15-
// CHECK-NEXT: ret half [[SUB_I]]
11+
// CHECK-NEXT: [[MUL_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[eta]], [[eta]]
12+
// CHECK-NEXT: [[TMP0:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[N:%.*]], %I
13+
// CHECK_NEXT: [[TMP1:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[TMP0:%.*]], [[TMP0:%.*]]
14+
// CHECK_NEXT: [[SUB1_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half 0xH3C00, [[TMP1:%.*]]
15+
// CHECK_NEXT: [[MUL4_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half %mul.i, [[SUB1_I:%.*]]
16+
// CHECK_NEXT: [[SUB5_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half 0xH3C00, [[MUL4_I:%.*]]
17+
// CHECK_NEXT: [[CMP_I:%.*]] = fcmp reassoc nnan ninf nsz arcp afn olt half [[SUB5_I:%.*]], 0xH0000
18+
// CHECK_NEXT: br i1 [[CMP_I:%.*]], label %_ZN4hlsl8__detail12refract_implIDhEET_S2_S2_S2_.exit, label %if.else.i
19+
// CHECK_NEXT:
20+
// CHECK_NEXT: if.else.i: ; preds = %entry
21+
// CHECK_NEXT: [[MUL6_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[eta]], %I
22+
// CHECK_NEXT: [[MUL7_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[N:%.*]], %I
23+
// CHECK_NEXT: [[MUL8_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[MUL7_I:%.*]], [[eta]]
24+
// CHECK_NEXT: %2 = tail call reassoc nnan ninf nsz arcp afn half @llvm.sqrt.f16(half [[SUB5_I:%.*]])
25+
// CHECK_NEXT: [[ADD_I:%.*]] = fadd reassoc nnan ninf nsz arcp afn half %2, [[MUL8_I:%.*]]
26+
// CHECK_NEXT: [[MUL9_I:%.*]] = fmul reassoc nnan ninf nsz arcp afn half [[ADD_I:%.*]], [[N:%.*]]
27+
// CHECK_NEXT: [[SUB10_I:%.*]] = fsub reassoc nnan ninf nsz arcp afn half [[MUL6_I:%.*]], [[MUL9_I:%.*]]
28+
// CHECK_NEXT: br label %_ZN4hlsl8__detail12refract_implIDhEET_S2_S2_S2_.exit
29+
// CHECK_NEXT:
30+
// CHECK_NEXT: _ZN4hlsl8__detail12refract_implIDhEET_S2_S2_S2_.exit: ; preds = %entry, %if.else.i
31+
// CHECK_NEXT: [[RETVAL_0_I:%.*]] = phi nsz half [ [[SUB10_I:%.*]], %if.else.i ], [ 0xH0000, %entry ]
32+
// CHECK_NEXT: ret half [[RETVAL_0_I:%.*]]
33+
1634
//
1735
// SPVCHECK-LABEL: define hidden spir_func noundef nofpclass(nan inf) half @_Z17test_reflect_halfDhDh(
1836
// SPVCHECK-SAME: half noundef nofpclass(nan inf) [[I:%.*]], half noundef nofpclass(nan inf) [[N:%.*]]) local_unnamed_addr #[[ATTR0:[0-9]+]] {

llvm/lib/IR/IRBuilder.cpp

Lines changed: 20 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -865,8 +865,27 @@ CallInst *IRBuilderBase::CreateIntrinsic(Type *RetTy, Intrinsic::ID ID,
865865

866866
SmallVector<Type *> ArgTys;
867867
ArgTys.reserve(Args.size());
868-
for (auto &I : Args)
868+
int i =0;
869+
Type * Ity;
870+
Type * Nty;
871+
Type * etaty;
872+
873+
for (auto &I : Args) {
874+
if(i ==0)
875+
Ity = I->getType();
876+
if(i ==1)
877+
Nty = I->getType();
878+
if(i ==2)
879+
etaty = I->getType();
869880
ArgTys.push_back(I->getType());
881+
i++;
882+
}
883+
//assert(Ity == RetTy);
884+
//assert(Nty == RetTy);
885+
assert(Nty == Ity);
886+
887+
888+
870889
FunctionType *FTy = FunctionType::get(RetTy, ArgTys, false);
871890
SmallVector<Type *> OverloadTys;
872891
Intrinsic::MatchIntrinsicTypesResult Res =

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