!fixup use getDT, fix crash if CFG is modified.

Author: fhahn

llvm/lib/CodeGen/CodeGenPrepare.cpp

@@ -5948,10 +5948,12 @@ bool CodeGenPrepare::optimizeMemoryInst(Instruction *MemoryInst, Value *Addr,
   auto InsertPos = findInsertPos(Addr, MemoryInst, SunkAddr);
 
   // TODO: Adjust insert point considering (Base|Scaled)Reg if possible.
-  if (!SunkAddr &&
-      ((AddrMode.BaseReg && !DT->dominates(AddrMode.BaseReg, &*InsertPos)) ||
-       (AddrMode.ScaledReg && !DT->dominates(AddrMode.ScaledReg, &*InsertPos))))
-    return Modified;
+  if (!SunkAddr) {
+    auto &DT = getDT(*MemoryInst->getFunction());
+    if ((AddrMode.BaseReg && !DT.dominates(AddrMode.BaseReg, &*InsertPos)) ||
+        (AddrMode.ScaledReg && !DT.dominates(AddrMode.ScaledReg, &*InsertPos)))
+      return Modified;
+  }
 
   IRBuilder<> Builder(MemoryInst->getParent(), InsertPos);
 

llvm/test/Transforms/CodeGenPrepare/X86/sink-addrmode-reg-does-not-geps.ll

@@ -1,13 +1,12 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5
 ; RUN: opt -S -passes='require<profile-summary>,function(codegenprepare)' %s | FileCheck %s
 
-
 target triple = "x86_64-unknown-linux"
 
 declare i1 @cond(float)
 
-define void @test(ptr %src) {
-; CHECK-LABEL: define void @test(
+define void @scaled_reg_does_not_dominate_insert_point(ptr %src) {
+; CHECK-LABEL: define void @scaled_reg_does_not_dominate_insert_point(
 ; CHECK-SAME: ptr [[SRC:%.*]]) {
 ; CHECK-NEXT:  [[BB:.*]]:
 ; CHECK-NEXT:    br label %[[LOOP:.*]]
@@ -46,3 +45,32 @@ loop:
 exit:
   ret void
 }
+
+define void @check_dt_after_modifying_cfg(ptr %dst, i64 %x, i8 %y, i8 %z) {
+; CHECK-LABEL: define void @check_dt_after_modifying_cfg(
+; CHECK-SAME: ptr [[DST:%.*]], i64 [[X:%.*]], i8 [[Y:%.*]], i8 [[Z:%.*]]) {
+; CHECK-NEXT:  [[ENTRY:.*]]:
+; CHECK-NEXT:    [[OFFSET:%.*]] = lshr i64 [[X]], 2
+; CHECK-NEXT:    [[SEL_FROZEN:%.*]] = freeze i8 [[Z]]
+; CHECK-NEXT:    [[CMP:%.*]] = icmp slt i8 [[SEL_FROZEN]], 0
+; CHECK-NEXT:    br i1 [[CMP]], label %[[SELECT_END:.*]], label %[[SELECT_FALSE_SINK:.*]]
+; CHECK:       [[SELECT_FALSE_SINK]]:
+; CHECK-NEXT:    [[SMIN:%.*]] = tail call i8 @llvm.smin.i8(i8 [[Y]], i8 0)
+; CHECK-NEXT:    br label %[[SELECT_END]]
+; CHECK:       [[SELECT_END]]:
+; CHECK-NEXT:    [[SEL:%.*]] = phi i8 [ 0, %[[ENTRY]] ], [ [[SMIN]], %[[SELECT_FALSE_SINK]] ]
+; CHECK-NEXT:    [[SUNKADDR:%.*]] = getelementptr i8, ptr [[DST]], i64 [[OFFSET]]
+; CHECK-NEXT:    store i8 [[SEL]], ptr [[SUNKADDR]], align 1
+; CHECK-NEXT:    ret void
+;
+entry:
+  %offset = lshr i64 %x, 2
+  %gep.dst = getelementptr i8, ptr %dst, i64 %offset
+  %smin = tail call i8 @llvm.smin.i8(i8 %y, i8 0)
+  %cmp = icmp slt i8 %z, 0
+  %sel = select i1 %cmp, i8 0, i8 %smin
+  store i8 %sel, ptr %gep.dst, align 1
+  ret void
+}
+
+declare i8 @llvm.smin.i8(i8, i8) #0