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‎llvm/test/CodeGen/RISCV/sextw-removal.ll‎

Lines changed: 186 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,9 +1,9 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+f,+zknh,+v -target-abi=lp64f \
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; RUN: | FileCheck %s --check-prefixes=CHECK,RV64I
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; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba,+zbb,+f,+zknh,+v -target-abi=lp64f \
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; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba,+zbb,+zbkb,+f,+zknh,+v -target-abi=lp64f \
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; RUN: | FileCheck %s --check-prefixes=CHECK,RV64ZBB
6-
; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba,+zbb,+f,+zknh,+v -target-abi=lp64f \
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; RUN: llc < %s -mtriple=riscv64 -mattr=+m,+zba,+zbb,+zbkb,+f,+zknh,+v -target-abi=lp64f \
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; RUN: -riscv-disable-sextw-removal | FileCheck %s --check-prefix=NOREMOVAL
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define void @test1(i32 signext %arg, i32 signext %arg1) nounwind {
@@ -1499,3 +1499,187 @@ bb7: ; preds = %bb2
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}
15001500

15011501
declare i32 @llvm.riscv.vmv.x.s.nxv1i32( <vscale x 1 x i32>)
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; Test that we can look through brev8 in hasAllNBitUsers.
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define signext i32 @test21(i64 %arg1, i64 %arg2, i64 %arg3) {
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; RV64I-LABEL: test21:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: addi a2, a2, -1
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; RV64I-NEXT: lui a3, 61681
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; RV64I-NEXT: lui a4, 209715
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; RV64I-NEXT: addi a3, a3, -241
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; RV64I-NEXT: addi a4, a4, 819
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; RV64I-NEXT: slli a5, a3, 32
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; RV64I-NEXT: add a3, a3, a5
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; RV64I-NEXT: slli a5, a4, 32
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; RV64I-NEXT: add a4, a4, a5
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; RV64I-NEXT: li a5, 256
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; RV64I-NEXT: .LBB25_1: # %bb2
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; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
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; RV64I-NEXT: srli a6, a0, 4
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; RV64I-NEXT: and a0, a0, a3
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; RV64I-NEXT: and a6, a6, a3
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; RV64I-NEXT: slli a0, a0, 4
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; RV64I-NEXT: or a0, a6, a0
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; RV64I-NEXT: srli a6, a0, 2
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; RV64I-NEXT: and a0, a0, a4
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; RV64I-NEXT: and a6, a6, a4
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; RV64I-NEXT: slli a0, a0, 2
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; RV64I-NEXT: or a0, a6, a0
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; RV64I-NEXT: andi a6, a0, 65
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; RV64I-NEXT: srli a0, a0, 1
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; RV64I-NEXT: slli a6, a6, 1
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; RV64I-NEXT: andi a0, a0, 1104
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; RV64I-NEXT: or a0, a0, a6
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; RV64I-NEXT: addi a2, a2, 1
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; RV64I-NEXT: add a0, a0, a1
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; RV64I-NEXT: bltu a2, a5, .LBB25_1
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; RV64I-NEXT: # %bb.2: # %bb7
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; RV64I-NEXT: sext.w a0, a0
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; RV64I-NEXT: ret
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;
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; RV64ZBB-LABEL: test21:
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; RV64ZBB: # %bb.0: # %entry
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; RV64ZBB-NEXT: addi a2, a2, -1
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; RV64ZBB-NEXT: li a3, 256
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; RV64ZBB-NEXT: .LBB25_1: # %bb2
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; RV64ZBB-NEXT: # =>This Inner Loop Header: Depth=1
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; RV64ZBB-NEXT: brev8 a0, a0
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; RV64ZBB-NEXT: andi a0, a0, 1234
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; RV64ZBB-NEXT: addi a2, a2, 1
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; RV64ZBB-NEXT: add a0, a0, a1
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; RV64ZBB-NEXT: bltu a2, a3, .LBB25_1
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; RV64ZBB-NEXT: # %bb.2: # %bb7
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; RV64ZBB-NEXT: sext.w a0, a0
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; RV64ZBB-NEXT: ret
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;
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; NOREMOVAL-LABEL: test21:
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; NOREMOVAL: # %bb.0: # %entry
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; NOREMOVAL-NEXT: addi a2, a2, -1
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; NOREMOVAL-NEXT: li a3, 256
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; NOREMOVAL-NEXT: .LBB25_1: # %bb2
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; NOREMOVAL-NEXT: # =>This Inner Loop Header: Depth=1
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; NOREMOVAL-NEXT: brev8 a0, a0
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; NOREMOVAL-NEXT: andi a0, a0, 1234
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; NOREMOVAL-NEXT: addi a2, a2, 1
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; NOREMOVAL-NEXT: add a0, a0, a1
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; NOREMOVAL-NEXT: bltu a2, a3, .LBB25_1
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; NOREMOVAL-NEXT: # %bb.2: # %bb7
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; NOREMOVAL-NEXT: sext.w a0, a0
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; NOREMOVAL-NEXT: ret
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entry:
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br label %bb2
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bb2: ; preds = %bb2, %entry
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%i1 = phi i64 [ %arg1, %entry ], [ %i5, %bb2 ]
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%i2 = phi i64 [ %arg3, %entry ], [ %i3, %bb2 ]
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%i3 = add i64 %i2, 1
1577+
%bswap = call i64 @llvm.bswap.i64(i64 %i1)
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%bitreverse = call i64 @llvm.bitreverse.i64(i64 %bswap)
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%i4 = and i64 %bitreverse, 1234
1580+
%i5 = add i64 %i4, %arg2
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%i6 = icmp ugt i64 %i2, 255
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br i1 %i6, label %bb7, label %bb2
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bb7: ; preds = %bb2
1585+
%i7 = trunc i64 %i5 to i32
1586+
ret i32 %i7
1587+
}
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; Negative test for looking through brev8. Make sure we consider that it works
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; on bytes.
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define signext i32 @test22(i64 %arg1, i64 %arg2, i64 %arg3) {
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; RV64I-LABEL: test22:
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; RV64I: # %bb.0: # %entry
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; RV64I-NEXT: addi a2, a2, -1
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; RV64I-NEXT: lui a3, %hi(.LCPI26_0)
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; RV64I-NEXT: lui a4, %hi(.LCPI26_1)
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; RV64I-NEXT: lui a5, %hi(.LCPI26_2)
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; RV64I-NEXT: lui a6, %hi(.LCPI26_3)
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; RV64I-NEXT: li a7, 69
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; RV64I-NEXT: ld a3, %lo(.LCPI26_0)(a3)
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; RV64I-NEXT: ld a4, %lo(.LCPI26_1)(a4)
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; RV64I-NEXT: ld a5, %lo(.LCPI26_2)(a5)
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; RV64I-NEXT: ld a6, %lo(.LCPI26_3)(a6)
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; RV64I-NEXT: slli a7, a7, 32
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; RV64I-NEXT: li t0, 65
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; RV64I-NEXT: slli t0, t0, 28
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; RV64I-NEXT: li t1, 256
1608+
; RV64I-NEXT: .LBB26_1: # %bb2
1609+
; RV64I-NEXT: # =>This Inner Loop Header: Depth=1
1610+
; RV64I-NEXT: slli t2, a0, 11
1611+
; RV64I-NEXT: slli a0, a0, 3
1612+
; RV64I-NEXT: and t2, t2, a3
1613+
; RV64I-NEXT: and a0, a0, a4
1614+
; RV64I-NEXT: or a0, a0, t2
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; RV64I-NEXT: srli t2, a0, 2
1616+
; RV64I-NEXT: and a0, a0, a6
1617+
; RV64I-NEXT: and t2, t2, a5
1618+
; RV64I-NEXT: slli a0, a0, 2
1619+
; RV64I-NEXT: or a0, t2, a0
1620+
; RV64I-NEXT: srli t2, a0, 1
1621+
; RV64I-NEXT: and a0, a0, t0
1622+
; RV64I-NEXT: and t2, t2, a7
1623+
; RV64I-NEXT: slli a0, a0, 1
1624+
; RV64I-NEXT: or a0, t2, a0
1625+
; RV64I-NEXT: srli a0, a0, 28
1626+
; RV64I-NEXT: addi a2, a2, 1
1627+
; RV64I-NEXT: add a0, a0, a1
1628+
; RV64I-NEXT: bltu a2, t1, .LBB26_1
1629+
; RV64I-NEXT: # %bb.2: # %bb7
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; RV64I-NEXT: sext.w a0, a0
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; RV64I-NEXT: ret
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;
1633+
; RV64ZBB-LABEL: test22:
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; RV64ZBB: # %bb.0: # %entry
1635+
; RV64ZBB-NEXT: addi a2, a2, -1
1636+
; RV64ZBB-NEXT: li a3, 256
1637+
; RV64ZBB-NEXT: .LBB26_1: # %bb2
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; RV64ZBB-NEXT: # =>This Inner Loop Header: Depth=1
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; RV64ZBB-NEXT: slli a0, a0, 7
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; RV64ZBB-NEXT: brev8 a0, a0
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; RV64ZBB-NEXT: srli a0, a0, 28
1642+
; RV64ZBB-NEXT: andi a0, a0, 1234
1643+
; RV64ZBB-NEXT: addi a2, a2, 1
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; RV64ZBB-NEXT: add a0, a0, a1
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; RV64ZBB-NEXT: bltu a2, a3, .LBB26_1
1646+
; RV64ZBB-NEXT: # %bb.2: # %bb7
1647+
; RV64ZBB-NEXT: sext.w a0, a0
1648+
; RV64ZBB-NEXT: ret
1649+
;
1650+
; NOREMOVAL-LABEL: test22:
1651+
; NOREMOVAL: # %bb.0: # %entry
1652+
; NOREMOVAL-NEXT: addi a2, a2, -1
1653+
; NOREMOVAL-NEXT: li a3, 256
1654+
; NOREMOVAL-NEXT: .LBB26_1: # %bb2
1655+
; NOREMOVAL-NEXT: # =>This Inner Loop Header: Depth=1
1656+
; NOREMOVAL-NEXT: slli a0, a0, 7
1657+
; NOREMOVAL-NEXT: brev8 a0, a0
1658+
; NOREMOVAL-NEXT: srli a0, a0, 28
1659+
; NOREMOVAL-NEXT: andi a0, a0, 1234
1660+
; NOREMOVAL-NEXT: addi a2, a2, 1
1661+
; NOREMOVAL-NEXT: add a0, a0, a1
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; NOREMOVAL-NEXT: bltu a2, a3, .LBB26_1
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; NOREMOVAL-NEXT: # %bb.2: # %bb7
1664+
; NOREMOVAL-NEXT: sext.w a0, a0
1665+
; NOREMOVAL-NEXT: ret
1666+
entry:
1667+
br label %bb2
1668+
1669+
bb2: ; preds = %bb2, %entry
1670+
%i1 = phi i64 [ %arg1, %entry ], [ %i5, %bb2 ]
1671+
%i2 = phi i64 [ %arg3, %entry ], [ %i3, %bb2 ]
1672+
%i3 = add i64 %i2, 1
1673+
%shl = shl i64 %i1, 7
1674+
%bswap = call i64 @llvm.bswap.i64(i64 %shl)
1675+
%bitreverse = call i64 @llvm.bitreverse.i64(i64 %bswap)
1676+
%lshr = lshr i64 %bitreverse, 28
1677+
%i4 = and i64 %lshr, 1234
1678+
%i5 = add i64 %i4, %arg2
1679+
%i6 = icmp ugt i64 %i2, 255
1680+
br i1 %i6, label %bb7, label %bb2
1681+
1682+
bb7: ; preds = %bb2
1683+
%i7 = trunc i64 %i5 to i32
1684+
ret i32 %i7
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}

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