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[X86] X86TargetLowering::computeKnownBitsForTargetNode - add X86ISD::VPMADD52L\H handling - again (#159230)
FIX #155386
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‎llvm/lib/Target/X86/X86ISelLowering.cpp‎

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@@ -38999,6 +38999,26 @@ void X86TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
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}
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break;
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}
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case X86ISD::VPMADD52L:
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case X86ISD::VPMADD52H: {
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assert(Op.getValueType().isVector() &&
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Op.getValueType().getScalarType() == MVT::i64 &&
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"Unexpected VPMADD52 type");
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KnownBits K0 =
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DAG.computeKnownBits(Op.getOperand(0), DemandedElts, Depth + 1);
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KnownBits K1 =
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DAG.computeKnownBits(Op.getOperand(1), DemandedElts, Depth + 1);
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KnownBits KAcc =
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DAG.computeKnownBits(Op.getOperand(2), DemandedElts, Depth + 1);
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K0 = K0.trunc(52);
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K1 = K1.trunc(52);
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KnownBits KnownMul = (Op.getOpcode() == X86ISD::VPMADD52L)
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? KnownBits::mul(K0, K1)
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: KnownBits::mulhu(K0, K1);
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KnownMul = KnownMul.zext(64);
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Known = KnownBits::add(KAcc, KnownMul);
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return;
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}
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}
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// Handle target shuffles.

‎llvm/test/CodeGen/X86/knownbits-vpmadd52.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512ifma,+avx512vl | FileCheck %s --check-prefixes=AVX512VL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avxifma | FileCheck %s --check-prefixes=AVXIFMA
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; High-52 path
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declare <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)
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declare <4 x i64> @llvm.x86.avx512.vpmadd52h.uq.256(<4 x i64>, <4 x i64>, <4 x i64>)
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; High-52, 25x25 masked inputs, accumulator = 1, expected constant fold.
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define <2 x i64> @kb52h_128_mask25_and1(<2 x i64> %x, <2 x i64> %y) {
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; AVX512VL-LABEL: kb52h_128_mask25_and1:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vmovddup {{.*#+}} xmm0 = [1,1]
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; AVX512VL-NEXT: # xmm0 = mem[0,0]
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; AVX512VL-NEXT: retq
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;
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; AVXIFMA-LABEL: kb52h_128_mask25_and1:
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; AVXIFMA: # %bb.0:
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; AVXIFMA-NEXT: vmovddup {{.*#+}} xmm0 = [1,1]
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; AVXIFMA-NEXT: # xmm0 = mem[0,0]
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; AVXIFMA-NEXT: retq
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%mx = and <2 x i64> %x, splat (i64 33554431) ; (1<<25)-1
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%my = and <2 x i64> %y, splat (i64 33554431) ; (1<<25)-1
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%r = call <2 x i64> @llvm.x86.avx512.vpmadd52h.uq.128(
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<2 x i64> splat (i64 1),
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<2 x i64> %mx,
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<2 x i64> %my)
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%ret = and <2 x i64> %r, splat (i64 1)
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ret <2 x i64> %ret
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}
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; High-52, 25x26 masked inputs, accumulator = 1, expected constant fold.
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define <4 x i64> @kb52h_256_mask25x26_acc1(<4 x i64> %x, <4 x i64> %y) {
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; AVX512VL-LABEL: kb52h_256_mask25x26_acc1:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vbroadcastsd {{.*#+}} ymm0 = [1,1,1,1]
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; AVX512VL-NEXT: retq
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;
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; AVXIFMA-LABEL: kb52h_256_mask25x26_acc1:
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; AVXIFMA: # %bb.0:
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; AVXIFMA-NEXT: vbroadcastsd {{.*#+}} ymm0 = [1,1,1,1]
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; AVXIFMA-NEXT: retq
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%mx = and <4 x i64> %x, splat (i64 33554431) ; (1<<25)-1
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%my = and <4 x i64> %y, splat (i64 67108863) ; (1<<26)-1
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%r = call <4 x i64> @llvm.x86.avx512.vpmadd52h.uq.256(
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<4 x i64> splat (i64 1),
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<4 x i64> %mx, <4 x i64> %my)
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ret <4 x i64> %r
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}
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; Low-52 path
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declare <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(<2 x i64>, <2 x i64>, <2 x i64>)
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declare <4 x i64> @llvm.x86.avx512.vpmadd52l.uq.256(<4 x i64>, <4 x i64>, <4 x i64>)
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; Low-52, 26x26 masked inputs, add with accumulator.
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define <2 x i64> @kb52l_128_mask26x26_add_intrin(<2 x i64> %x, <2 x i64> %y, <2 x i64> %acc) {
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; AVX512VL-LABEL: kb52l_128_mask26x26_add_intrin:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpbroadcastq {{.*#+}} xmm3 = [67108863,67108863]
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; AVX512VL-NEXT: vpand %xmm3, %xmm0, %xmm0
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; AVX512VL-NEXT: vpand %xmm3, %xmm1, %xmm1
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; AVX512VL-NEXT: vpmadd52luq %xmm1, %xmm0, %xmm2
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; AVX512VL-NEXT: vmovdqa %xmm2, %xmm0
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; AVX512VL-NEXT: retq
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;
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; AVXIFMA-LABEL: kb52l_128_mask26x26_add_intrin:
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; AVXIFMA: # %bb.0:
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; AVXIFMA-NEXT: vpbroadcastq {{.*#+}} xmm3 = [67108863,67108863]
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; AVXIFMA-NEXT: vpand %xmm3, %xmm0, %xmm0
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; AVXIFMA-NEXT: vpand %xmm3, %xmm1, %xmm1
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; AVXIFMA-NEXT: {vex} vpmadd52luq %xmm1, %xmm0, %xmm2
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; AVXIFMA-NEXT: vmovdqa %xmm2, %xmm0
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; AVXIFMA-NEXT: retq
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%xm = and <2 x i64> %x, splat (i64 67108863) ; (1<<26)-1
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%ym = and <2 x i64> %y, splat (i64 67108863) ; (1<<26)-1
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%r = call <2 x i64> @llvm.x86.avx512.vpmadd52l.uq.128(
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<2 x i64> %acc, <2 x i64> %xm, <2 x i64> %ym)
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ret <2 x i64> %r
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}
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; Low-52, 50-bit × 2-bit masked inputs, add with accumulator.
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define <4 x i64> @kb52l_256_mask50x3_add_intrin(<4 x i64> %x, <4 x i64> %y, <4 x i64> %acc) {
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; AVX512VL-LABEL: kb52l_256_mask50x3_add_intrin:
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; AVX512VL: # %bb.0:
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; AVX512VL-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm0, %ymm0
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; AVX512VL-NEXT: vpandq {{\.?LCPI[0-9]+_[0-9]+}}(%rip){1to4}, %ymm1, %ymm1
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; AVX512VL-NEXT: vpmadd52luq %ymm1, %ymm0, %ymm2
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; AVX512VL-NEXT: vmovdqa %ymm2, %ymm0
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; AVX512VL-NEXT: retq
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;
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; AVXIFMA-LABEL: kb52l_256_mask50x3_add_intrin:
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; AVXIFMA: # %bb.0:
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; AVXIFMA-NEXT: vpbroadcastq {{.*#+}} ymm3 = [1125899906842623,1125899906842623,1125899906842623,1125899906842623]
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; AVXIFMA-NEXT: vpand %ymm3, %ymm0, %ymm0
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; AVXIFMA-NEXT: vpbroadcastq {{.*#+}} ymm3 = [3,3,3,3]
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; AVXIFMA-NEXT: vpand %ymm3, %ymm1, %ymm1
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; AVXIFMA-NEXT: {vex} vpmadd52luq %ymm1, %ymm0, %ymm2
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; AVXIFMA-NEXT: vmovdqa %ymm2, %ymm0
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; AVXIFMA-NEXT: retq
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%xm = and <4 x i64> %x, splat (i64 1125899906842623) ; (1<<50)-1
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%ym = and <4 x i64> %y, splat (i64 3) ; (1<<2)-1
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%r = call <4 x i64> @llvm.x86.avx512.vpmadd52l.uq.256(
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<4 x i64> %acc, <4 x i64> %xm, <4 x i64> %ym)
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ret <4 x i64> %r
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}
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