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1 parent 6e906eb commit dcc3580Copy full SHA for dcc3580
llvm/include/llvm/IR/Intrinsics.td
@@ -2119,12 +2119,6 @@ let IntrProperties = [IntrNoMem] in {
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LLVMMatchType<0>,
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LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
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llvm_i32_ty]>;
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- def int_vp_clmul : DefaultAttrsIntrinsic<[ llvm_anyvector_ty ],
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- [ LLVMMatchType<0>,
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- LLVMMatchType<0>,
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- LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>,
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- llvm_i32_ty]>;
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def int_vp_sadd_sat : DefaultAttrsIntrinsic<[ llvm_anyvector_ty ],
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[ LLVMMatchType<0>,
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