@@ -1395,3 +1395,55 @@ entry:
13951395 %sub = sub i64 %c , %mul
13961396 ret i64 %sub
13971397}
1398+
1399+ define i64 @umull_and_lshr (i64 %x ) {
1400+ ; CHECK-LABEL: umull_and_lshr:
1401+ ; CHECK: // %bb.0:
1402+ ; CHECK-NEXT: lsr x8, x0, #32
1403+ ; CHECK-NEXT: and x9, x0, #0xffffffff
1404+ ; CHECK-NEXT: umull x0, w9, w8
1405+ ; CHECK-NEXT: ret
1406+ %lo = and i64 %x , u0xffffffff
1407+ %hi = lshr i64 %x , 32
1408+ %mul = mul i64 %lo , %hi
1409+ ret i64 %mul
1410+ }
1411+
1412+ define i64 @umull_and_and (i64 %x , i64 %y ) {
1413+ ; CHECK-LABEL: umull_and_and:
1414+ ; CHECK: // %bb.0:
1415+ ; CHECK-NEXT: umull x0, w0, w1
1416+ ; CHECK-NEXT: ret
1417+ %lo = and i64 %x , u0xffffffff
1418+ %hi = and i64 %y , u0xffffffff
1419+ %mul = mul i64 %lo , %hi
1420+ ret i64 %mul
1421+ }
1422+
1423+ define i64 @umaddl_and_lshr (i64 %x , i64 %a ) {
1424+ ; CHECK-LABEL: umaddl_and_lshr:
1425+ ; CHECK: // %bb.0:
1426+ ; CHECK-NEXT: lsr x8, x0, #32
1427+ ; CHECK-NEXT: and x9, x0, #0xffffffff
1428+ ; CHECK-NEXT: umaddl x0, w9, w8, x1
1429+ ; CHECK-NEXT: ret
1430+ %lo = and i64 %x , u0xffffffff
1431+ %hi = lshr i64 %x , 32
1432+ %mul = mul i64 %lo , %hi
1433+ %add = add i64 %a , %mul
1434+ ret i64 %add
1435+ }
1436+
1437+ define i64 @umaddl_and_and (i64 %x , i64 %y , i64 %a ) {
1438+ ; CHECK-LABEL: umaddl_and_and:
1439+ ; CHECK: // %bb.0:
1440+ ; CHECK-NEXT: and x8, x0, #0xffffffff
1441+ ; CHECK-NEXT: and x9, x1, #0xffffffff
1442+ ; CHECK-NEXT: umaddl x0, w8, w9, x2
1443+ ; CHECK-NEXT: ret
1444+ %lo = and i64 %x , u0xffffffff
1445+ %hi = and i64 %y , u0xffffffff
1446+ %mul = mul i64 %lo , %hi
1447+ %add = add i64 %a , %mul
1448+ ret i64 %add
1449+ }
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