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[TargetLowering] Freeze operands in UCMP and SCMP
LHS and RHS are used multiple times.
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19 files changed

+1383
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lines changed

19 files changed

+1383
-1254
lines changed

‎llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8582,6 +8582,8 @@ LegalizerHelper::lowerThreewayCompare(MachineInstr &MI) {
85828582
LLT DstTy = MRI.getType(Dst);
85838583
LLT SrcTy = MRI.getType(Cmp->getReg(1));
85848584
LLT CmpTy = DstTy.changeElementSize(1);
8585+
auto LHS = MIRBuilder.buildFreeze(SrcTy, Cmp->getLHSReg());
8586+
auto RHS = MIRBuilder.buildFreeze(SrcTy, Cmp->getRHSReg());
85858587

85868588
CmpInst::Predicate LTPredicate = Cmp->isSigned()
85878589
? CmpInst::Predicate::ICMP_SLT
@@ -8591,10 +8593,8 @@ LegalizerHelper::lowerThreewayCompare(MachineInstr &MI) {
85918593
: CmpInst::Predicate::ICMP_UGT;
85928594

85938595
auto Zero = MIRBuilder.buildConstant(DstTy, 0);
8594-
auto IsGT = MIRBuilder.buildICmp(GTPredicate, CmpTy, Cmp->getLHSReg(),
8595-
Cmp->getRHSReg());
8596-
auto IsLT = MIRBuilder.buildICmp(LTPredicate, CmpTy, Cmp->getLHSReg(),
8597-
Cmp->getRHSReg());
8596+
auto IsGT = MIRBuilder.buildICmp(GTPredicate, CmpTy, LHS, RHS);
8597+
auto IsLT = MIRBuilder.buildICmp(LTPredicate, CmpTy, LHS, RHS);
85988598

85998599
auto &Ctx = MIRBuilder.getMF().getFunction().getContext();
86008600
auto BC = TLI.getBooleanContents(DstTy.isVector(), /*isFP=*/false);

‎llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -10956,8 +10956,8 @@ SDValue TargetLowering::expandAddSubSat(SDNode *Node, SelectionDAG &DAG) const {
1095610956

1095710957
SDValue TargetLowering::expandCMP(SDNode *Node, SelectionDAG &DAG) const {
1095810958
unsigned Opcode = Node->getOpcode();
10959-
SDValue LHS = Node->getOperand(0);
10960-
SDValue RHS = Node->getOperand(1);
10959+
SDValue LHS = DAG.getFreeze(Node->getOperand(0));
10960+
SDValue RHS = DAG.getFreeze(Node->getOperand(1));
1096110961
EVT VT = LHS.getValueType();
1096210962
EVT ResVT = Node->getValueType(0);
1096310963
EVT BoolVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), VT);

‎llvm/lib/Target/ARM/ARMISelLowering.cpp‎

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -10479,6 +10479,9 @@ SDValue ARMTargetLowering::LowerCMP(SDValue Op, SelectionDAG &DAG) const {
1047910479

1048010480
// Special case for Thumb1 UCMP only
1048110481
if (!IsSigned && Subtarget->isThumb1Only()) {
10482+
LHS = DAG.getFreeze(LHS);
10483+
RHS = DAG.getFreeze(RHS);
10484+
1048210485
// For Thumb unsigned comparison, use this sequence:
1048310486
// subs r2, r0, r1 ; r2 = LHS - RHS, sets flags
1048410487
// sbc r2, r2 ; r2 = r2 - r2 - !carry
@@ -10511,10 +10514,7 @@ SDValue ARMTargetLowering::LowerCMP(SDValue Op, SelectionDAG &DAG) const {
1051110514
// Final subtraction: Sbc1Result - Sbc2Result (no flags needed)
1051210515
SDValue Result =
1051310516
DAG.getNode(ISD::SUB, dl, MVT::i32, Sbc1Result, Sbc2Result);
10514-
if (Op.getValueType() != MVT::i32)
10515-
Result = DAG.getSExtOrTrunc(Result, dl, Op.getValueType());
10516-
10517-
return Result;
10517+
return DAG.getSExtOrTrunc(Result, dl, Op.getValueType());
1051810518
}
1051910519

1052010520
// For the ARM assembly pattern:
@@ -10582,10 +10582,7 @@ SDValue ARMTargetLowering::LowerCMP(SDValue Op, SelectionDAG &DAG) const {
1058210582
SDValue Result2 = DAG.getNode(ARMISD::CMOV, dl, MVT::i32, Result1, MinusOne,
1058310583
LTCondValue, Flags);
1058410584

10585-
if (Op.getValueType() != MVT::i32)
10586-
Result2 = DAG.getSExtOrTrunc(Result2, dl, Op.getValueType());
10587-
10588-
return Result2;
10585+
return DAG.getSExtOrTrunc(Result2, dl, Op.getValueType());
1058910586
}
1059010587

1059110588
SDValue ARMTargetLowering::LowerOperation(SDValue Op, SelectionDAG &DAG) const {

‎llvm/test/CodeGen/AArch64/GlobalISel/legalize-threeway-cmp.mir‎

Lines changed: 22 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -7,8 +7,10 @@ body: |
77
; CHECK-LABEL: name: test_scmp
88
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
99
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x0
10-
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[COPY]](s64), [[COPY1]]
11-
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[COPY]](s64), [[COPY1]]
10+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE [[COPY]]
11+
; CHECK-NEXT: [[FREEZE1:%[0-9]+]]:_(s64) = G_FREEZE [[COPY1]]
12+
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(sgt), [[FREEZE]](s64), [[FREEZE1]]
13+
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(slt), [[FREEZE]](s64), [[FREEZE1]]
1214
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
1315
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
1416
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[C]], [[C1]]
@@ -30,8 +32,10 @@ body: |
3032
; CHECK-LABEL: name: test_ucmp
3133
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
3234
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x0
33-
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s64), [[COPY1]]
34-
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]]
35+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE [[COPY]]
36+
; CHECK-NEXT: [[FREEZE1:%[0-9]+]]:_(s64) = G_FREEZE [[COPY1]]
37+
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[FREEZE]](s64), [[FREEZE1]]
38+
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[FREEZE]](s64), [[FREEZE1]]
3539
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
3640
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0
3741
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP]](s32), [[C]], [[C1]]
@@ -61,8 +65,10 @@ body: |
6165
; CHECK-NEXT: [[COPY6:%[0-9]+]]:_(s32) = COPY $w2
6266
; CHECK-NEXT: [[COPY7:%[0-9]+]]:_(s32) = COPY $w3
6367
; CHECK-NEXT: [[BUILD_VECTOR1:%[0-9]+]]:_(<4 x s32>) = G_BUILD_VECTOR [[COPY]](s32), [[COPY1]](s32), [[COPY2]](s32), [[COPY3]](s32)
64-
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(ugt), [[BUILD_VECTOR]](<4 x s32>), [[BUILD_VECTOR1]]
65-
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(ult), [[BUILD_VECTOR]](<4 x s32>), [[BUILD_VECTOR1]]
68+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(<4 x s32>) = G_FREEZE [[BUILD_VECTOR]]
69+
; CHECK-NEXT: [[FREEZE1:%[0-9]+]]:_(<4 x s32>) = G_FREEZE [[BUILD_VECTOR1]]
70+
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(ugt), [[FREEZE]](<4 x s32>), [[FREEZE1]]
71+
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(<4 x s32>) = G_ICMP intpred(ult), [[FREEZE]](<4 x s32>), [[FREEZE1]]
6672
; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[ICMP1]](<4 x s32>)
6773
; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(<4 x s16>) = G_TRUNC [[ICMP]](<4 x s32>)
6874
; CHECK-NEXT: [[SUB:%[0-9]+]]:_(<4 x s16>) = G_SUB [[TRUNC]], [[TRUNC1]]
@@ -92,13 +98,17 @@ body: |
9298
; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $x0
9399
; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $x0
94100
; CHECK-NEXT: [[DEF:%[0-9]+]]:_(s64) = G_IMPLICIT_DEF
95-
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[COPY]](s64), [[COPY1]]
96-
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[DEF]](s64), [[DEF]]
97-
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[DEF]](s64), [[DEF]]
101+
; CHECK-NEXT: [[FREEZE:%[0-9]+]]:_(s64) = G_FREEZE [[COPY]]
102+
; CHECK-NEXT: [[FREEZE1:%[0-9]+]]:_(s64) = G_FREEZE [[DEF]]
103+
; CHECK-NEXT: [[FREEZE2:%[0-9]+]]:_(s64) = G_FREEZE [[COPY1]]
104+
; CHECK-NEXT: [[FREEZE3:%[0-9]+]]:_(s64) = G_FREEZE [[DEF]]
105+
; CHECK-NEXT: [[ICMP:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[FREEZE]](s64), [[FREEZE2]]
106+
; CHECK-NEXT: [[ICMP1:%[0-9]+]]:_(s32) = G_ICMP intpred(ugt), [[FREEZE1]](s64), [[FREEZE3]]
107+
; CHECK-NEXT: [[ICMP2:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[FREEZE1]](s64), [[FREEZE3]]
98108
; CHECK-NEXT: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[ICMP2]](s32), [[ICMP]], [[ICMP1]]
99-
; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[COPY]](s64), [[COPY1]]
100-
; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[DEF]](s64), [[DEF]]
101-
; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[DEF]](s64), [[DEF]]
109+
; CHECK-NEXT: [[ICMP3:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[FREEZE]](s64), [[FREEZE2]]
110+
; CHECK-NEXT: [[ICMP4:%[0-9]+]]:_(s32) = G_ICMP intpred(ult), [[FREEZE1]](s64), [[FREEZE3]]
111+
; CHECK-NEXT: [[ICMP5:%[0-9]+]]:_(s32) = G_ICMP intpred(eq), [[FREEZE1]](s64), [[FREEZE3]]
102112
; CHECK-NEXT: [[SELECT1:%[0-9]+]]:_(s32) = G_SELECT [[ICMP5]](s32), [[ICMP3]], [[ICMP4]]
103113
; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
104114
; CHECK-NEXT: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 0

‎llvm/test/CodeGen/AArch64/freeze.ll‎

Lines changed: 22 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -522,16 +522,28 @@ define i32 @freeze_scmp(i32 %a0) nounwind {
522522
}
523523

524524
define i32 @freeze_ucmp(i32 %a0) nounwind {
525-
; CHECK-LABEL: freeze_ucmp:
526-
; CHECK: // %bb.0:
527-
; CHECK-NEXT: mov w8, #2 // =0x2
528-
; CHECK-NEXT: cmp w8, w0
529-
; CHECK-NEXT: cset w8, hi
530-
; CHECK-NEXT: csinv w8, w8, wzr, hs
531-
; CHECK-NEXT: cmp w8, #1
532-
; CHECK-NEXT: cset w8, hi
533-
; CHECK-NEXT: csinv w0, w8, wzr, hs
534-
; CHECK-NEXT: ret
525+
; CHECK-SD-LABEL: freeze_ucmp:
526+
; CHECK-SD: // %bb.0:
527+
; CHECK-SD-NEXT: mov w8, #2 // =0x2
528+
; CHECK-SD-NEXT: cmp w8, w0
529+
; CHECK-SD-NEXT: cset w8, hi
530+
; CHECK-SD-NEXT: csinv w8, w8, wzr, hs
531+
; CHECK-SD-NEXT: cmp w8, #1
532+
; CHECK-SD-NEXT: cset w8, hi
533+
; CHECK-SD-NEXT: csinv w0, w8, wzr, hs
534+
; CHECK-SD-NEXT: ret
535+
;
536+
; CHECK-GI-LABEL: freeze_ucmp:
537+
; CHECK-GI: // %bb.0:
538+
; CHECK-GI-NEXT: mov w8, #2 // =0x2
539+
; CHECK-GI-NEXT: mov w9, #1 // =0x1
540+
; CHECK-GI-NEXT: cmp w8, w0
541+
; CHECK-GI-NEXT: cset w8, hi
542+
; CHECK-GI-NEXT: csinv w8, w8, wzr, hs
543+
; CHECK-GI-NEXT: cmp w8, w9
544+
; CHECK-GI-NEXT: cset w8, hi
545+
; CHECK-GI-NEXT: csinv w0, w8, wzr, hs
546+
; CHECK-GI-NEXT: ret
535547
%x = call i32 @llvm.ucmp.i32(i32 2, i32 %a0)
536548
%y = freeze i32 %x
537549
%z = call i32 @llvm.ucmp.i32(i32 %y, i32 1)

‎llvm/test/CodeGen/AArch64/ucmp.ll‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -13,8 +13,8 @@ define i8 @ucmp.8.8(i8 %x, i8 %y) nounwind {
1313
;
1414
; CHECK-GI-LABEL: ucmp.8.8:
1515
; CHECK-GI: // %bb.0:
16-
; CHECK-GI-NEXT: and w8, w0, #0xff
17-
; CHECK-GI-NEXT: and w9, w1, #0xff
16+
; CHECK-GI-NEXT: uxtb w8, w0
17+
; CHECK-GI-NEXT: uxtb w9, w1
1818
; CHECK-GI-NEXT: cmp w8, w9
1919
; CHECK-GI-NEXT: cset w8, hi
2020
; CHECK-GI-NEXT: csinv w0, w8, wzr, hs
@@ -34,8 +34,8 @@ define i8 @ucmp.8.16(i16 %x, i16 %y) nounwind {
3434
;
3535
; CHECK-GI-LABEL: ucmp.8.16:
3636
; CHECK-GI: // %bb.0:
37-
; CHECK-GI-NEXT: and w8, w0, #0xffff
38-
; CHECK-GI-NEXT: and w9, w1, #0xffff
37+
; CHECK-GI-NEXT: uxth w8, w0
38+
; CHECK-GI-NEXT: uxth w9, w1
3939
; CHECK-GI-NEXT: cmp w8, w9
4040
; CHECK-GI-NEXT: cset w8, hi
4141
; CHECK-GI-NEXT: csinv w0, w8, wzr, hs

‎llvm/test/CodeGen/ARM/scmp.ll‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -58,23 +58,23 @@ define i8 @scmp_8_128(i128 %x, i128 %y) nounwind {
5858
; CHECK: @ %bb.0:
5959
; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr}
6060
; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr}
61-
; CHECK-NEXT: ldr r4, [sp, #24]
62-
; CHECK-NEXT: mov r5, #0
63-
; CHECK-NEXT: ldr r6, [sp, #28]
64-
; CHECK-NEXT: subs r7, r0, r4
65-
; CHECK-NEXT: ldr r12, [sp, #32]
66-
; CHECK-NEXT: sbcs r7, r1, r6
67-
; CHECK-NEXT: ldr lr, [sp, #36]
68-
; CHECK-NEXT: sbcs r7, r2, r12
69-
; CHECK-NEXT: sbcs r7, r3, lr
61+
; CHECK-NEXT: ldr r5, [sp, #24]
62+
; CHECK-NEXT: mov r6, #0
63+
; CHECK-NEXT: ldr r4, [sp, #28]
64+
; CHECK-NEXT: subs r7, r0, r5
65+
; CHECK-NEXT: ldr lr, [sp, #32]
66+
; CHECK-NEXT: sbcs r7, r1, r4
67+
; CHECK-NEXT: ldr r12, [sp, #36]
68+
; CHECK-NEXT: sbcs r7, r2, lr
69+
; CHECK-NEXT: sbcs r7, r3, r12
7070
; CHECK-NEXT: mov r7, #0
7171
; CHECK-NEXT: movwlt r7, #1
72-
; CHECK-NEXT: subs r0, r4, r0
73-
; CHECK-NEXT: sbcs r0, r6, r1
74-
; CHECK-NEXT: sbcs r0, r12, r2
75-
; CHECK-NEXT: sbcs r0, lr, r3
76-
; CHECK-NEXT: movwlt r5, #1
77-
; CHECK-NEXT: sub r0, r5, r7
72+
; CHECK-NEXT: subs r0, r5, r0
73+
; CHECK-NEXT: sbcs r0, r4, r1
74+
; CHECK-NEXT: sbcs r0, lr, r2
75+
; CHECK-NEXT: sbcs r0, r12, r3
76+
; CHECK-NEXT: movwlt r6, #1
77+
; CHECK-NEXT: sub r0, r6, r7
7878
; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc}
7979
%1 = call i8 @llvm.scmp(i128 %x, i128 %y)
8080
ret i8 %1

‎llvm/test/CodeGen/ARM/ucmp.ll‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -58,23 +58,23 @@ define i8 @ucmp_8_128(i128 %x, i128 %y) nounwind {
5858
; CHECK: @ %bb.0:
5959
; CHECK-NEXT: .save {r4, r5, r6, r7, r11, lr}
6060
; CHECK-NEXT: push {r4, r5, r6, r7, r11, lr}
61-
; CHECK-NEXT: ldr r4, [sp, #24]
62-
; CHECK-NEXT: mov r5, #0
63-
; CHECK-NEXT: ldr r6, [sp, #28]
64-
; CHECK-NEXT: subs r7, r0, r4
65-
; CHECK-NEXT: ldr r12, [sp, #32]
66-
; CHECK-NEXT: sbcs r7, r1, r6
67-
; CHECK-NEXT: ldr lr, [sp, #36]
68-
; CHECK-NEXT: sbcs r7, r2, r12
69-
; CHECK-NEXT: sbcs r7, r3, lr
61+
; CHECK-NEXT: ldr r5, [sp, #24]
62+
; CHECK-NEXT: mov r6, #0
63+
; CHECK-NEXT: ldr r4, [sp, #28]
64+
; CHECK-NEXT: subs r7, r0, r5
65+
; CHECK-NEXT: ldr lr, [sp, #32]
66+
; CHECK-NEXT: sbcs r7, r1, r4
67+
; CHECK-NEXT: ldr r12, [sp, #36]
68+
; CHECK-NEXT: sbcs r7, r2, lr
69+
; CHECK-NEXT: sbcs r7, r3, r12
7070
; CHECK-NEXT: mov r7, #0
7171
; CHECK-NEXT: movwlo r7, #1
72-
; CHECK-NEXT: subs r0, r4, r0
73-
; CHECK-NEXT: sbcs r0, r6, r1
74-
; CHECK-NEXT: sbcs r0, r12, r2
75-
; CHECK-NEXT: sbcs r0, lr, r3
76-
; CHECK-NEXT: movwlo r5, #1
77-
; CHECK-NEXT: sub r0, r5, r7
72+
; CHECK-NEXT: subs r0, r5, r0
73+
; CHECK-NEXT: sbcs r0, r4, r1
74+
; CHECK-NEXT: sbcs r0, lr, r2
75+
; CHECK-NEXT: sbcs r0, r12, r3
76+
; CHECK-NEXT: movwlo r6, #1
77+
; CHECK-NEXT: sub r0, r6, r7
7878
; CHECK-NEXT: pop {r4, r5, r6, r7, r11, pc}
7979
%1 = call i8 @llvm.ucmp(i128 %x, i128 %y)
8080
ret i8 %1

‎llvm/test/CodeGen/PowerPC/scmp.ll‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -5,10 +5,10 @@ define i8 @scmp_8_8(i8 signext %x, i8 signext %y) nounwind {
55
; CHECK-LABEL: scmp_8_8:
66
; CHECK: # %bb.0:
77
; CHECK-NEXT: cmpw 3, 4
8-
; CHECK-NEXT: sub 5, 4, 3
9-
; CHECK-NEXT: li 3, -1
10-
; CHECK-NEXT: rldicl 5, 5, 1, 63
11-
; CHECK-NEXT: isellt 3, 3, 5
8+
; CHECK-NEXT: sub 3, 4, 3
9+
; CHECK-NEXT: li 4, -1
10+
; CHECK-NEXT: rldicl 3, 3, 1, 63
11+
; CHECK-NEXT: isellt 3, 4, 3
1212
; CHECK-NEXT: blr
1313
%1 = call i8 @llvm.scmp(i8 %x, i8 %y)
1414
ret i8 %1
@@ -18,10 +18,10 @@ define i8 @scmp_8_16(i16 signext %x, i16 signext %y) nounwind {
1818
; CHECK-LABEL: scmp_8_16:
1919
; CHECK: # %bb.0:
2020
; CHECK-NEXT: cmpw 3, 4
21-
; CHECK-NEXT: sub 5, 4, 3
22-
; CHECK-NEXT: li 3, -1
23-
; CHECK-NEXT: rldicl 5, 5, 1, 63
24-
; CHECK-NEXT: isellt 3, 3, 5
21+
; CHECK-NEXT: sub 3, 4, 3
22+
; CHECK-NEXT: li 4, -1
23+
; CHECK-NEXT: rldicl 3, 3, 1, 63
24+
; CHECK-NEXT: isellt 3, 4, 3
2525
; CHECK-NEXT: blr
2626
%1 = call i8 @llvm.scmp(i16 %x, i16 %y)
2727
ret i8 %1

‎llvm/test/CodeGen/PowerPC/ucmp.ll‎

Lines changed: 8 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -4,11 +4,13 @@
44
define i8 @ucmp_8_8(i8 zeroext %x, i8 zeroext %y) nounwind {
55
; CHECK-LABEL: ucmp_8_8:
66
; CHECK: # %bb.0:
7+
; CHECK-NEXT: clrldi 5, 4, 32
8+
; CHECK-NEXT: clrldi 6, 3, 32
9+
; CHECK-NEXT: sub 5, 5, 6
710
; CHECK-NEXT: cmplw 3, 4
8-
; CHECK-NEXT: sub 5, 4, 3
911
; CHECK-NEXT: li 3, -1
10-
; CHECK-NEXT: rldicl 5, 5, 1, 63
1112
; CHECK-NEXT: rldic 3, 3, 0, 32
13+
; CHECK-NEXT: rldicl 5, 5, 1, 63
1214
; CHECK-NEXT: isellt 3, 3, 5
1315
; CHECK-NEXT: blr
1416
%1 = call i8 @llvm.ucmp(i8 %x, i8 %y)
@@ -18,11 +20,13 @@ define i8 @ucmp_8_8(i8 zeroext %x, i8 zeroext %y) nounwind {
1820
define i8 @ucmp_8_16(i16 zeroext %x, i16 zeroext %y) nounwind {
1921
; CHECK-LABEL: ucmp_8_16:
2022
; CHECK: # %bb.0:
23+
; CHECK-NEXT: clrldi 5, 4, 32
24+
; CHECK-NEXT: clrldi 6, 3, 32
25+
; CHECK-NEXT: sub 5, 5, 6
2126
; CHECK-NEXT: cmplw 3, 4
22-
; CHECK-NEXT: sub 5, 4, 3
2327
; CHECK-NEXT: li 3, -1
24-
; CHECK-NEXT: rldicl 5, 5, 1, 63
2528
; CHECK-NEXT: rldic 3, 3, 0, 32
29+
; CHECK-NEXT: rldicl 5, 5, 1, 63
2630
; CHECK-NEXT: isellt 3, 3, 5
2731
; CHECK-NEXT: blr
2832
%1 = call i8 @llvm.ucmp(i16 %x, i16 %y)

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