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1 parent 7af201c commit ddb04d7Copy full SHA for ddb04d7
llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -6360,7 +6360,8 @@ SDValue DAGCombiner::visitAND(SDNode *N) {
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SDValue Extendee = Ext->getOperand(0);
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unsigned ScalarWidth = Extendee.getValueType().getScalarSizeInBits();
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- if (N1C->getAPIntValue().isMask(ScalarWidth)) {
+ if (N1C->getAPIntValue().isMask(ScalarWidth) &&
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+ (!LegalOperations || TLI.isOperationLegal(ISD::ZERO_EXTEND, ExtVT))) {
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// (and (extract_subvector (zext|anyext|sext v) _) iN_mask)
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// => (extract_subvector (iN_zeroext v))
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SDValue ZeroExtExtendee =
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