Skip to content

Commit ddb5984

Browse files
LancernLancern
committed
[CIR][NFC] Update existing atomic ops to match assembly conventions
This patch updates the definitions of `cir.atomic.xchg` and `cir.atomic.cmpxchg` to make them follow the established CIR assembly conventions. Some other minor changes are also made along the way: - The verifier for `cir.atomic.cmpxchg` is now fully declared in TableGen. - The `Op` suffix is appended to `CIR_AtomicXchg` and `CIR_AtomicCmpXchg` to follow the naming conventions for TableGen operation records.
1 parent 505956e commit ddb5984

File tree

7 files changed

+150
-80
lines changed

7 files changed

+150
-80
lines changed

‎clang/include/clang/CIR/Dialect/IR/CIROps.td‎

Lines changed: 18 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -4172,7 +4172,7 @@ def CIR_ThrowOp : CIR_Op<"throw"> {
41724172
// Atomic operations
41734173
//===----------------------------------------------------------------------===//
41744174

4175-
def CIR_AtomicXchg : CIR_Op<"atomic.xchg", [
4175+
def CIR_AtomicXchgOp : CIR_Op<"atomic.xchg", [
41764176
AllTypesMatch<["result", "val"]>,
41774177
TypesMatchWith<"type of 'val' must match the pointee type of 'ptr'",
41784178
"ptr", "val", "mlir::cast<cir::PointerType>($_self).getPointee()">
@@ -4190,9 +4190,7 @@ def CIR_AtomicXchg : CIR_Op<"atomic.xchg", [
41904190
Example:
41914191

41924192
```mlir
4193-
%res = cir.atomic.xchg(%ptr : !cir.ptr<!u64i>,
4194-
%val : !u64i,
4195-
seq_cst) : !u64i
4193+
%res = cir.atomic.xchg seq_cst %ptr, %val : !cir.ptr<!u64i> -> !u64i
41964194
```
41974195
}];
41984196

@@ -4207,12 +4205,16 @@ def CIR_AtomicXchg : CIR_Op<"atomic.xchg", [
42074205
let assemblyFormat = [{
42084206
$mem_order (`volatile` $is_volatile^)?
42094207
$ptr `,` $val
4210-
`:` qualified(type($ptr)) `->` type($result) attr-dict
4208+
`:` functional-type(operands, results) attr-dict
42114209
}];
42124210
}
42134211

4214-
def CIR_AtomicCmpXchg : CIR_Op<"atomic.cmpxchg", [
4215-
AllTypesMatch<["old", "expected", "desired"]>
4212+
def CIR_AtomicCmpXchgOp : CIR_Op<"atomic.cmpxchg", [
4213+
AllTypesMatch<["old", "expected", "desired"]>,
4214+
TypesMatchWith<"type of 'expected' must match the pointee type of 'ptr'",
4215+
"ptr", "expected", "mlir::cast<cir::PointerType>($_self).getPointee()">,
4216+
TypesMatchWith<"type of 'desired' must match the pointee type of 'ptr'",
4217+
"ptr", "desired", "mlir::cast<cir::PointerType>($_self).getPointee()">
42164218
]> {
42174219
let summary = "Atomic compare and exchange";
42184220
let description = [{
@@ -4245,12 +4247,11 @@ def CIR_AtomicCmpXchg : CIR_Op<"atomic.cmpxchg", [
42454247
Example:
42464248

42474249
```mlir
4248-
%old, %success = cir.atomic.cmpxchg(%ptr : !cir.ptr<!u64i>,
4249-
%expected : !u64i,
4250-
%desired : !u64i,
4251-
success = seq_cst,
4252-
failure = seq_cst) weak
4253-
: (!u64i, !cir.bool)
4250+
%old, %success = cir.atomic.cmpxchg weak seq_cst %ptr, %expected, %desired
4251+
: (!cir.ptr<!u64i>, !u64i, !u64i) -> (!u64i, !cir.bool)
4252+
%old, %success = cir.atomic.cmpxchg weak success(seq_cst) failure(acquire)
4253+
%ptr, %expected, %desired
4254+
: (!cir.ptr<!u64i>, !u64i, !u64i) -> (!u64i, !cir.bool)
42544255
```
42554256
}];
42564257
let results = (outs CIR_AnyType:$old, CIR_BoolType:$success);
@@ -4264,20 +4265,13 @@ def CIR_AtomicCmpXchg : CIR_Op<"atomic.cmpxchg", [
42644265
UnitAttr:$is_volatile);
42654266

42664267
let assemblyFormat = [{
4267-
`(`
4268-
$ptr `:` qualified(type($ptr)) `,`
4269-
$expected `:` type($expected) `,`
4270-
$desired `:` type($desired) `,`
4271-
`success` `=` $succ_order `,`
4272-
`failure` `=` $fail_order
4273-
`)`
4274-
(`align` `(` $alignment^ `)`)?
42754268
(`weak` $weak^)?
4269+
custom<AtomicCmpXchgMemOrder>($succ_order, $fail_order)
4270+
$ptr `,` $expected `,` $desired
4271+
(`align` `(` $alignment^ `)`)?
42764272
(`volatile` $is_volatile^)?
4277-
`:` `(` type($old) `,` type($success) `)` attr-dict
4273+
`:` functional-type(operands, results) attr-dict
42784274
}];
4279-
4280-
let hasVerifier = 1;
42814275
}
42824276

42834277
#endif // CLANG_CIR_DIALECT_IR_CIROPS_TD

‎clang/lib/CIR/CodeGen/CIRGenAtomic.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -255,7 +255,7 @@ static void emitAtomicCmpXchg(CIRGenFunction &cgf, AtomicExpr *e, bool isWeak,
255255
mlir::Value expected = builder.createLoad(loc, val1);
256256
mlir::Value desired = builder.createLoad(loc, val2);
257257

258-
auto cmpxchg = cir::AtomicCmpXchg::create(
258+
auto cmpxchg = cir::AtomicCmpXchgOp::create(
259259
builder, loc, expected.getType(), builder.getBoolTy(), ptr.getPointer(),
260260
expected, desired,
261261
cir::MemOrderAttr::get(&cgf.getMLIRContext(), successOrder),
@@ -404,7 +404,7 @@ static void emitAtomicOp(CIRGenFunction &cgf, AtomicExpr *expr, Address dest,
404404
case AtomicExpr::AO__c11_atomic_exchange:
405405
case AtomicExpr::AO__atomic_exchange_n:
406406
case AtomicExpr::AO__atomic_exchange:
407-
opName = cir::AtomicXchg::getOperationName();
407+
opName = cir::AtomicXchgOp::getOperationName();
408408
break;
409409

410410
case AtomicExpr::AO__opencl_atomic_init:

‎clang/lib/CIR/Dialect/IR/CIRDialect.cpp‎

Lines changed: 48 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -235,6 +235,54 @@ static void printOmittedTerminatorRegion(mlir::OpAsmPrinter &printer,
235235
/*printBlockTerminators=*/!omitRegionTerm(region));
236236
}
237237

238+
static mlir::ParseResult
239+
parseAtomicCmpXchgMemOrder(mlir::OpAsmParser &parser,
240+
cir::MemOrderAttr &successOrder,
241+
cir::MemOrderAttr &failureOrder) {
242+
auto parseMemOrder = [&](cir::MemOrderAttr *output) -> mlir::ParseResult {
243+
mlir::SMLoc loc = parser.getCurrentLocation();
244+
llvm::StringRef memOrderStr;
245+
if (parser.parseKeyword(&memOrderStr))
246+
return failure();
247+
std::optional<cir::MemOrder> memOrder = symbolizeMemOrder(memOrderStr);
248+
if (!memOrder.has_value())
249+
return parser.emitError(loc, "unknown memory order \"")
250+
<< memOrderStr << "\"";
251+
*output = cir::MemOrderAttr::get(parser.getContext(), *memOrder);
252+
return success();
253+
};
254+
255+
if (parser.parseOptionalKeyword("success")) {
256+
// No "success" keyword found. successOrder and failureOrder will have the
257+
// same value.
258+
if (parseMemOrder(&successOrder))
259+
return failure();
260+
failureOrder = successOrder;
261+
return success();
262+
}
263+
264+
if (parser.parseLParen() || parseMemOrder(&successOrder) ||
265+
parser.parseRParen())
266+
return failure();
267+
268+
if (parser.parseKeyword("failure") || parser.parseLParen() ||
269+
parseMemOrder(&failureOrder) || parser.parseRParen())
270+
return failure();
271+
272+
return success();
273+
}
274+
275+
static void printAtomicCmpXchgMemOrder(mlir::OpAsmPrinter &printer,
276+
cir::AtomicCmpXchgOp &op,
277+
cir::MemOrderAttr successOrder,
278+
cir::MemOrderAttr failureOrder) {
279+
if (successOrder.getValue() == failureOrder.getValue())
280+
printer << stringifyMemOrder(successOrder.getValue());
281+
else
282+
printer << "success(" << stringifyMemOrder(successOrder.getValue()) << ") "
283+
<< "failure(" << stringifyMemOrder(failureOrder.getValue()) << ")";
284+
}
285+
238286
//===----------------------------------------------------------------------===//
239287
// AllocaOp
240288
//===----------------------------------------------------------------------===//
@@ -2846,20 +2894,6 @@ mlir::LogicalResult cir::ThrowOp::verify() {
28462894
return failure();
28472895
}
28482896

2849-
//===----------------------------------------------------------------------===//
2850-
// AtomicCmpXchg
2851-
//===----------------------------------------------------------------------===//
2852-
2853-
LogicalResult cir::AtomicCmpXchg::verify() {
2854-
mlir::Type pointeeType = getPtr().getType().getPointee();
2855-
2856-
if (pointeeType != getExpected().getType() ||
2857-
pointeeType != getDesired().getType())
2858-
return emitOpError("ptr, expected and desired types must match");
2859-
2860-
return success();
2861-
}
2862-
28632897
//===----------------------------------------------------------------------===//
28642898
// TypeInfoAttr
28652899
//===----------------------------------------------------------------------===//

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -694,8 +694,8 @@ getLLVMMemOrder(std::optional<cir::MemOrder> memorder) {
694694
llvm_unreachable("unknown memory order");
695695
}
696696

697-
mlir::LogicalResult CIRToLLVMAtomicCmpXchgLowering::matchAndRewrite(
698-
cir::AtomicCmpXchg op, OpAdaptor adaptor,
697+
mlir::LogicalResult CIRToLLVMAtomicCmpXchgOpLowering::matchAndRewrite(
698+
cir::AtomicCmpXchgOp op, OpAdaptor adaptor,
699699
mlir::ConversionPatternRewriter &rewriter) const {
700700
mlir::Value expected = adaptor.getExpected();
701701
mlir::Value desired = adaptor.getDesired();
@@ -719,8 +719,8 @@ mlir::LogicalResult CIRToLLVMAtomicCmpXchgLowering::matchAndRewrite(
719719
return mlir::success();
720720
}
721721

722-
mlir::LogicalResult CIRToLLVMAtomicXchgLowering::matchAndRewrite(
723-
cir::AtomicXchg op, OpAdaptor adaptor,
722+
mlir::LogicalResult CIRToLLVMAtomicXchgOpLowering::matchAndRewrite(
723+
cir::AtomicXchgOp op, OpAdaptor adaptor,
724724
mlir::ConversionPatternRewriter &rewriter) const {
725725
assert(!cir::MissingFeatures::atomicSyncScopeID());
726726
mlir::LLVM::AtomicOrdering llvmOrder = getLLVMMemOrder(adaptor.getMemOrder());

‎clang/test/CIR/CodeGen/atomic.c‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -211,7 +211,7 @@ void c11_atomic_cmpxchg_strong(_Atomic(int) *ptr, int *expected, int desired) {
211211

212212
__c11_atomic_compare_exchange_strong(ptr, expected, desired,
213213
__ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE);
214-
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg(%{{.+}} : !cir.ptr<!s32i>, %{{.+}} : !s32i, %{{.+}} : !s32i, success = seq_cst, failure = acquire) align(4) : (!s32i, !cir.bool)
214+
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg success(seq_cst) failure(acquire) %{{.+}}, %{{.+}}, %{{.+}} align(4) : (!cir.ptr<!s32i>, !s32i, !s32i) -> (!s32i, !cir.bool)
215215
// CIR-NEXT: %[[FAILED:.+]] = cir.unary(not, %[[SUCCESS]]) : !cir.bool, !cir.bool
216216
// CIR-NEXT: cir.if %[[FAILED]] {
217217
// CIR-NEXT: cir.store align(4) %[[OLD]], %{{.+}} : !s32i, !cir.ptr<!s32i>
@@ -249,7 +249,7 @@ void c11_atomic_cmpxchg_weak(_Atomic(int) *ptr, int *expected, int desired) {
249249

250250
__c11_atomic_compare_exchange_weak(ptr, expected, desired,
251251
__ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE);
252-
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg(%{{.+}} : !cir.ptr<!s32i>, %{{.+}} : !s32i, %{{.+}} : !s32i, success = seq_cst, failure = acquire) align(4) weak : (!s32i, !cir.bool)
252+
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg weak success(seq_cst) failure(acquire) %{{.+}}, %{{.+}}, %{{.+}} align(4) : (!cir.ptr<!s32i>, !s32i, !s32i) -> (!s32i, !cir.bool)
253253
// CIR-NEXT: %[[FAILED:.+]] = cir.unary(not, %[[SUCCESS]]) : !cir.bool, !cir.bool
254254
// CIR-NEXT: cir.if %[[FAILED]] {
255255
// CIR-NEXT: cir.store align(4) %[[OLD]], %{{.+}} : !s32i, !cir.ptr<!s32i>
@@ -286,7 +286,7 @@ void atomic_cmpxchg(int *ptr, int *expected, int *desired) {
286286
// OGCG-LABEL: @atomic_cmpxchg
287287

288288
__atomic_compare_exchange(ptr, expected, desired, /*weak=*/0, __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE);
289-
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg(%{{.+}} : !cir.ptr<!s32i>, %{{.+}} : !s32i, %{{.+}} : !s32i, success = seq_cst, failure = acquire) align(4) : (!s32i, !cir.bool)
289+
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg success(seq_cst) failure(acquire) %{{.+}}, %{{.+}}, %{{.+}} align(4) : (!cir.ptr<!s32i>, !s32i, !s32i) -> (!s32i, !cir.bool)
290290
// CIR-NEXT: %[[FAILED:.+]] = cir.unary(not, %[[SUCCESS]]) : !cir.bool, !cir.bool
291291
// CIR-NEXT: cir.if %[[FAILED]] {
292292
// CIR-NEXT: cir.store align(4) %[[OLD]], %{{.+}} : !s32i, !cir.ptr<!s32i>
@@ -317,7 +317,7 @@ void atomic_cmpxchg(int *ptr, int *expected, int *desired) {
317317
// OGCG-NEXT: store i8 %[[SUCCESS_2]], ptr %{{.+}}, align 1
318318

319319
__atomic_compare_exchange(ptr, expected, desired, /*weak=*/1, __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE);
320-
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg(%{{.+}} : !cir.ptr<!s32i>, %{{.+}} : !s32i, %{{.+}} : !s32i, success = seq_cst, failure = acquire) align(4) weak : (!s32i, !cir.bool)
320+
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg weak success(seq_cst) failure(acquire) %{{.+}}, %{{.+}}, %{{.+}} align(4) : (!cir.ptr<!s32i>, !s32i, !s32i) -> (!s32i, !cir.bool)
321321
// CIR-NEXT: %[[FAILED:.+]] = cir.unary(not, %[[SUCCESS]]) : !cir.bool, !cir.bool
322322
// CIR-NEXT: cir.if %[[FAILED]] {
323323
// CIR-NEXT: cir.store align(4) %[[OLD]], %{{.+}} : !s32i, !cir.ptr<!s32i>
@@ -354,7 +354,7 @@ void atomic_cmpxchg_n(int *ptr, int *expected, int desired) {
354354
// OGCG-LABEL: @atomic_cmpxchg_n
355355

356356
__atomic_compare_exchange_n(ptr, expected, desired, /*weak=*/0, __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE);
357-
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg(%{{.+}} : !cir.ptr<!s32i>, %{{.+}} : !s32i, %{{.+}} : !s32i, success = seq_cst, failure = acquire) align(4) : (!s32i, !cir.bool)
357+
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg success(seq_cst) failure(acquire) %{{.+}}, %{{.+}}, %{{.+}} align(4) : (!cir.ptr<!s32i>, !s32i, !s32i) -> (!s32i, !cir.bool)
358358
// CIR-NEXT: %[[FAILED:.+]] = cir.unary(not, %[[SUCCESS]]) : !cir.bool, !cir.bool
359359
// CIR-NEXT: cir.if %[[FAILED]] {
360360
// CIR-NEXT: cir.store align(4) %[[OLD]], %{{.+}} : !s32i, !cir.ptr<!s32i>
@@ -385,7 +385,7 @@ void atomic_cmpxchg_n(int *ptr, int *expected, int desired) {
385385
// OGCG-NEXT: store i8 %[[SUCCESS_2]], ptr %{{.+}}, align 1
386386

387387
__atomic_compare_exchange_n(ptr, expected, desired, /*weak=*/1, __ATOMIC_SEQ_CST, __ATOMIC_ACQUIRE);
388-
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg(%{{.+}} : !cir.ptr<!s32i>, %{{.+}} : !s32i, %{{.+}} : !s32i, success = seq_cst, failure = acquire) align(4) weak : (!s32i, !cir.bool)
388+
// CIR: %[[OLD:.+]], %[[SUCCESS:.+]] = cir.atomic.cmpxchg weak success(seq_cst) failure(acquire) %{{.+}}, %{{.+}}, %{{.+}} align(4) : (!cir.ptr<!s32i>, !s32i, !s32i) -> (!s32i, !cir.bool)
389389
// CIR-NEXT: %[[FAILED:.+]] = cir.unary(not, %[[SUCCESS]]) : !cir.bool, !cir.bool
390390
// CIR-NEXT: cir.if %[[FAILED]] {
391391
// CIR-NEXT: cir.store align(4) %[[OLD]], %{{.+}} : !s32i, !cir.ptr<!s32i>
@@ -427,12 +427,12 @@ void c11_atomic_exchange(_Atomic(int) *ptr, int value) {
427427
__c11_atomic_exchange(ptr, value, __ATOMIC_RELEASE);
428428
__c11_atomic_exchange(ptr, value, __ATOMIC_ACQ_REL);
429429
__c11_atomic_exchange(ptr, value, __ATOMIC_SEQ_CST);
430-
// CIR: %{{.+}} = cir.atomic.xchg relaxed %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
431-
// CIR: %{{.+}} = cir.atomic.xchg consume %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
432-
// CIR: %{{.+}} = cir.atomic.xchg acquire %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
433-
// CIR: %{{.+}} = cir.atomic.xchg release %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
434-
// CIR: %{{.+}} = cir.atomic.xchg acq_rel %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
435-
// CIR: %{{.+}} = cir.atomic.xchg seq_cst %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
430+
// CIR: %{{.+}} = cir.atomic.xchg relaxed %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
431+
// CIR: %{{.+}} = cir.atomic.xchg consume %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
432+
// CIR: %{{.+}} = cir.atomic.xchg acquire %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
433+
// CIR: %{{.+}} = cir.atomic.xchg release %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
434+
// CIR: %{{.+}} = cir.atomic.xchg acq_rel %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
435+
// CIR: %{{.+}} = cir.atomic.xchg seq_cst %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
436436

437437
// LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
438438
// LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} acquire, align 4
@@ -460,12 +460,12 @@ void atomic_exchange(int *ptr, int *value, int *old) {
460460
__atomic_exchange(ptr, value, old, __ATOMIC_RELEASE);
461461
__atomic_exchange(ptr, value, old, __ATOMIC_ACQ_REL);
462462
__atomic_exchange(ptr, value, old, __ATOMIC_SEQ_CST);
463-
// CIR: %{{.+}} = cir.atomic.xchg relaxed %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
464-
// CIR: %{{.+}} = cir.atomic.xchg consume %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
465-
// CIR: %{{.+}} = cir.atomic.xchg acquire %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
466-
// CIR: %{{.+}} = cir.atomic.xchg release %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
467-
// CIR: %{{.+}} = cir.atomic.xchg acq_rel %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
468-
// CIR: %{{.+}} = cir.atomic.xchg seq_cst %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
463+
// CIR: %{{.+}} = cir.atomic.xchg relaxed %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
464+
// CIR: %{{.+}} = cir.atomic.xchg consume %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
465+
// CIR: %{{.+}} = cir.atomic.xchg acquire %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
466+
// CIR: %{{.+}} = cir.atomic.xchg release %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
467+
// CIR: %{{.+}} = cir.atomic.xchg acq_rel %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
468+
// CIR: %{{.+}} = cir.atomic.xchg seq_cst %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
469469

470470
// LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
471471
// LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} acquire, align 4
@@ -493,12 +493,12 @@ void atomic_exchange_n(int *ptr, int value) {
493493
__atomic_exchange_n(ptr, value, __ATOMIC_RELEASE);
494494
__atomic_exchange_n(ptr, value, __ATOMIC_ACQ_REL);
495495
__atomic_exchange_n(ptr, value, __ATOMIC_SEQ_CST);
496-
// CIR: %{{.+}} = cir.atomic.xchg relaxed %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
497-
// CIR: %{{.+}} = cir.atomic.xchg consume %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
498-
// CIR: %{{.+}} = cir.atomic.xchg acquire %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
499-
// CIR: %{{.+}} = cir.atomic.xchg release %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
500-
// CIR: %{{.+}} = cir.atomic.xchg acq_rel %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
501-
// CIR: %{{.+}} = cir.atomic.xchg seq_cst %{{.+}}, %{{.+}} : !cir.ptr<!s32i> -> !s32i
496+
// CIR: %{{.+}} = cir.atomic.xchg relaxed %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
497+
// CIR: %{{.+}} = cir.atomic.xchg consume %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
498+
// CIR: %{{.+}} = cir.atomic.xchg acquire %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
499+
// CIR: %{{.+}} = cir.atomic.xchg release %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
500+
// CIR: %{{.+}} = cir.atomic.xchg acq_rel %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
501+
// CIR: %{{.+}} = cir.atomic.xchg seq_cst %{{.+}}, %{{.+}} : (!cir.ptr<!s32i>, !s32i) -> !s32i
502502

503503
// LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} monotonic, align 4
504504
// LLVM: %{{.+}} = atomicrmw xchg ptr %{{.+}}, i32 %{{.+}} acquire, align 4

0 commit comments

Comments
 (0)