@@ -1490,7 +1490,7 @@ static DecodeStatus DecoderGPRRegisterClass(MCInst &Inst, unsigned RegNo,
14901490 return S;
14911491}
14921492
1493- static const uint16_t SPRDecoderTable[] = {
1493+ static const MCPhysReg SPRDecoderTable[] = {
14941494 ARM::S0, ARM::S1, ARM::S2, ARM::S3,
14951495 ARM::S4, ARM::S5, ARM::S6, ARM::S7,
14961496 ARM::S8, ARM::S9, ARM::S10, ARM::S11,
@@ -1518,7 +1518,7 @@ static DecodeStatus DecodeHPRRegisterClass(MCInst &Inst, unsigned RegNo,
15181518 return DecodeSPRRegisterClass (Inst, RegNo, Address, Decoder);
15191519}
15201520
1521- static const uint16_t DPRDecoderTable[] = {
1521+ static const MCPhysReg DPRDecoderTable[] = {
15221522 ARM::D0, ARM::D1, ARM::D2, ARM::D3,
15231523 ARM::D4, ARM::D5, ARM::D6, ARM::D7,
15241524 ARM::D8, ARM::D9, ARM::D10, ARM::D11,
@@ -1573,7 +1573,7 @@ static DecodeStatus DecodeDPR_VFP2RegisterClass(MCInst &Inst, unsigned RegNo,
15731573 return DecodeDPRRegisterClass (Inst, RegNo, Address, Decoder);
15741574}
15751575
1576- static const uint16_t QPRDecoderTable[] = {
1576+ static const MCPhysReg QPRDecoderTable[] = {
15771577 ARM::Q0, ARM::Q1, ARM::Q2, ARM::Q3,
15781578 ARM::Q4, ARM::Q5, ARM::Q6, ARM::Q7,
15791579 ARM::Q8, ARM::Q9, ARM::Q10, ARM::Q11,
@@ -1592,7 +1592,7 @@ static DecodeStatus DecodeQPRRegisterClass(MCInst &Inst, unsigned RegNo,
15921592 return MCDisassembler::Success;
15931593}
15941594
1595- static const uint16_t DPairDecoderTable[] = {
1595+ static const MCPhysReg DPairDecoderTable[] = {
15961596 ARM::Q0, ARM::D1_D2, ARM::Q1, ARM::D3_D4, ARM::Q2, ARM::D5_D6,
15971597 ARM::Q3, ARM::D7_D8, ARM::Q4, ARM::D9_D10, ARM::Q5, ARM::D11_D12,
15981598 ARM::Q6, ARM::D13_D14, ARM::Q7, ARM::D15_D16, ARM::Q8, ARM::D17_D18,
@@ -1612,7 +1612,7 @@ static DecodeStatus DecodeDPairRegisterClass(MCInst &Inst, unsigned RegNo,
16121612 return MCDisassembler::Success;
16131613}
16141614
1615- static const uint16_t DPairSpacedDecoderTable[] = {
1615+ static const MCPhysReg DPairSpacedDecoderTable[] = {
16161616 ARM::D0_D2, ARM::D1_D3, ARM::D2_D4, ARM::D3_D5,
16171617 ARM::D4_D6, ARM::D5_D7, ARM::D6_D8, ARM::D7_D9,
16181618 ARM::D8_D10, ARM::D9_D11, ARM::D10_D12, ARM::D11_D13,
@@ -6494,7 +6494,7 @@ static DecodeStatus DecodeMQPRRegisterClass(MCInst &Inst, unsigned RegNo,
64946494 return MCDisassembler::Success;
64956495}
64966496
6497- static const uint16_t QQPRDecoderTable[] = {
6497+ static const MCPhysReg QQPRDecoderTable[] = {
64986498 ARM::Q0_Q1, ARM::Q1_Q2, ARM::Q2_Q3, ARM::Q3_Q4,
64996499 ARM::Q4_Q5, ARM::Q5_Q6, ARM::Q6_Q7
65006500};
@@ -6510,7 +6510,7 @@ static DecodeStatus DecodeMQQPRRegisterClass(MCInst &Inst, unsigned RegNo,
65106510 return MCDisassembler::Success;
65116511}
65126512
6513- static const uint16_t QQQQPRDecoderTable[] = {
6513+ static const MCPhysReg QQQQPRDecoderTable[] = {
65146514 ARM::Q0_Q1_Q2_Q3, ARM::Q1_Q2_Q3_Q4, ARM::Q2_Q3_Q4_Q5,
65156515 ARM::Q3_Q4_Q5_Q6, ARM::Q4_Q5_Q6_Q7
65166516};
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