Skip to content

Commit de442b6

Browse files
XChyXChy
committed
[SelectionDAG] NFC. Add constant fold testcases for fshl/fshr
1 parent ad63a70 commit de442b6

File tree

1 file changed

+158
-0
lines changed

1 file changed

+158
-0
lines changed

‎llvm/test/CodeGen/X86/fshl-fshr-constant.ll‎

Lines changed: 158 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,158 @@
1+
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
2+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,CHECK-EXPAND
3+
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512vl,+avx512vbmi2 | FileCheck %s --check-prefixes=CHECK,CHECK-UNEXPAND
4+
5+
define <4 x i32> @test_fshl_constants() {
6+
; CHECK-EXPAND-LABEL: test_fshl_constants:
7+
; CHECK-EXPAND: # %bb.0:
8+
; CHECK-EXPAND-NEXT: vmovaps {{.*#+}} xmm0 = [0,512,2048,6144]
9+
; CHECK-EXPAND-NEXT: retq
10+
;
11+
; CHECK-UNEXPAND-LABEL: test_fshl_constants:
12+
; CHECK-UNEXPAND: # %bb.0:
13+
; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]
14+
; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm0 = [0,1,2,3]
15+
; CHECK-UNEXPAND-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
16+
; CHECK-UNEXPAND-NEXT: retq
17+
%res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
18+
ret <4 x i32> %res
19+
}
20+
21+
define <4 x i32> @test_fshl_splat_constants() {
22+
; CHECK-LABEL: test_fshl_splat_constants:
23+
; CHECK: # %bb.0:
24+
; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [256,256,256,256]
25+
; CHECK-NEXT: retq
26+
%res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 4, i32 4, i32 4, i32 4>, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)
27+
ret <4 x i32> %res
28+
}
29+
30+
define <4 x i32> @test_fshl_two_constants(<4 x i32> %a) {
31+
; CHECK-EXPAND-LABEL: test_fshl_two_constants:
32+
; CHECK-EXPAND: # %bb.0:
33+
; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
34+
; CHECK-EXPAND-NEXT: retq
35+
;
36+
; CHECK-UNEXPAND-LABEL: test_fshl_two_constants:
37+
; CHECK-UNEXPAND: # %bb.0:
38+
; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]
39+
; CHECK-UNEXPAND-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
40+
; CHECK-UNEXPAND-NEXT: retq
41+
%res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
42+
ret <4 x i32> %res
43+
}
44+
45+
define <4 x i32> @test_fshl_one_constant(<4 x i32> %a, <4 x i32> %b) {
46+
; CHECK-EXPAND-LABEL: test_fshl_one_constant:
47+
; CHECK-EXPAND: # %bb.0:
48+
; CHECK-EXPAND-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
49+
; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
50+
; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm0
51+
; CHECK-EXPAND-NEXT: retq
52+
;
53+
; CHECK-UNEXPAND-LABEL: test_fshl_one_constant:
54+
; CHECK-UNEXPAND: # %bb.0:
55+
; CHECK-UNEXPAND-NEXT: vpshldvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
56+
; CHECK-UNEXPAND-NEXT: retq
57+
%res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
58+
ret <4 x i32> %res
59+
}
60+
61+
define <4 x i32> @test_fshl_none_constant(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
62+
; CHECK-EXPAND-LABEL: test_fshl_none_constant:
63+
; CHECK-EXPAND: # %bb.0:
64+
; CHECK-EXPAND-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31]
65+
; CHECK-EXPAND-NEXT: vpandn %xmm3, %xmm2, %xmm4
66+
; CHECK-EXPAND-NEXT: vpsrld $1, %xmm1, %xmm1
67+
; CHECK-EXPAND-NEXT: vpsrlvd %xmm4, %xmm1, %xmm1
68+
; CHECK-EXPAND-NEXT: vpand %xmm3, %xmm2, %xmm2
69+
; CHECK-EXPAND-NEXT: vpsllvd %xmm2, %xmm0, %xmm0
70+
; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm0
71+
; CHECK-EXPAND-NEXT: retq
72+
;
73+
; CHECK-UNEXPAND-LABEL: test_fshl_none_constant:
74+
; CHECK-UNEXPAND: # %bb.0:
75+
; CHECK-UNEXPAND-NEXT: vpshldvd %xmm2, %xmm1, %xmm0
76+
; CHECK-UNEXPAND-NEXT: retq
77+
%res = call <4 x i32> @llvm.fshl.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
78+
ret <4 x i32> %res
79+
}
80+
81+
define <4 x i32> @test_fshr_constants() {
82+
; CHECK-EXPAND-LABEL: test_fshr_constants:
83+
; CHECK-EXPAND: # %bb.0:
84+
; CHECK-EXPAND-NEXT: vmovaps {{.*#+}} xmm0 = [0,8388608,8388608,6291456]
85+
; CHECK-EXPAND-NEXT: retq
86+
;
87+
; CHECK-UNEXPAND-LABEL: test_fshr_constants:
88+
; CHECK-UNEXPAND: # %bb.0:
89+
; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm1 = [0,1,2,3]
90+
; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm0 = [4,5,6,7]
91+
; CHECK-UNEXPAND-NEXT: vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm0
92+
; CHECK-UNEXPAND-NEXT: retq
93+
%res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> <i32 0, i32 1, i32 2, i32 3>, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
94+
ret <4 x i32> %res
95+
}
96+
97+
define <4 x i32> @test_fshr_two_constants(<4 x i32> %a) {
98+
; CHECK-EXPAND-LABEL: test_fshr_two_constants:
99+
; CHECK-EXPAND: # %bb.0:
100+
; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
101+
; CHECK-EXPAND-NEXT: retq
102+
;
103+
; CHECK-UNEXPAND-LABEL: test_fshr_two_constants:
104+
; CHECK-UNEXPAND: # %bb.0:
105+
; CHECK-UNEXPAND-NEXT: vpmovsxbd {{.*#+}} xmm1 = [4,5,6,7]
106+
; CHECK-UNEXPAND-NEXT: vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
107+
; CHECK-UNEXPAND-NEXT: vmovdqa %xmm1, %xmm0
108+
; CHECK-UNEXPAND-NEXT: retq
109+
%res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> <i32 4, i32 5, i32 6, i32 7>, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
110+
ret <4 x i32> %res
111+
}
112+
113+
define <4 x i32> @test_fshr_one_constant(<4 x i32> %a, <4 x i32> %b) {
114+
; CHECK-EXPAND-LABEL: test_fshr_one_constant:
115+
; CHECK-EXPAND: # %bb.0:
116+
; CHECK-EXPAND-NEXT: vpsrlvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm1, %xmm1
117+
; CHECK-EXPAND-NEXT: vpsllvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm0
118+
; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm0
119+
; CHECK-EXPAND-NEXT: retq
120+
;
121+
; CHECK-UNEXPAND-LABEL: test_fshr_one_constant:
122+
; CHECK-UNEXPAND: # %bb.0:
123+
; CHECK-UNEXPAND-NEXT: vpshrdvd {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0, %xmm1
124+
; CHECK-UNEXPAND-NEXT: vmovdqa %xmm1, %xmm0
125+
; CHECK-UNEXPAND-NEXT: retq
126+
%res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> <i32 8, i32 9, i32 10, i32 11>)
127+
ret <4 x i32> %res
128+
}
129+
130+
define <4 x i32> @test_fshr_none_constant(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c) {
131+
; CHECK-EXPAND-LABEL: test_fshr_none_constant:
132+
; CHECK-EXPAND: # %bb.0:
133+
; CHECK-EXPAND-NEXT: vpbroadcastd {{.*#+}} xmm3 = [31,31,31,31]
134+
; CHECK-EXPAND-NEXT: vpand %xmm3, %xmm2, %xmm4
135+
; CHECK-EXPAND-NEXT: vpsrlvd %xmm4, %xmm1, %xmm1
136+
; CHECK-EXPAND-NEXT: vpandn %xmm3, %xmm2, %xmm2
137+
; CHECK-EXPAND-NEXT: vpaddd %xmm0, %xmm0, %xmm0
138+
; CHECK-EXPAND-NEXT: vpsllvd %xmm2, %xmm0, %xmm0
139+
; CHECK-EXPAND-NEXT: vpor %xmm1, %xmm0, %xmm0
140+
; CHECK-EXPAND-NEXT: retq
141+
;
142+
; CHECK-UNEXPAND-LABEL: test_fshr_none_constant:
143+
; CHECK-UNEXPAND: # %bb.0:
144+
; CHECK-UNEXPAND-NEXT: vpshrdvd %xmm2, %xmm0, %xmm1
145+
; CHECK-UNEXPAND-NEXT: vmovdqa %xmm1, %xmm0
146+
; CHECK-UNEXPAND-NEXT: retq
147+
%res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> %a, <4 x i32> %b, <4 x i32> %c)
148+
ret <4 x i32> %res
149+
}
150+
151+
define <4 x i32> @test_fshr_splat_constants() {
152+
; CHECK-LABEL: test_fshr_splat_constants:
153+
; CHECK: # %bb.0:
154+
; CHECK-NEXT: vbroadcastss {{.*#+}} xmm0 = [16777216,16777216,16777216,16777216]
155+
; CHECK-NEXT: retq
156+
%res = call <4 x i32> @llvm.fshr.v4i32(<4 x i32> <i32 1, i32 1, i32 1, i32 1>, <4 x i32> <i32 4, i32 4, i32 4, i32 4>, <4 x i32> <i32 8, i32 8, i32 8, i32 8>)
157+
ret <4 x i32> %res
158+
}

0 commit comments

Comments
 (0)