Skip to content

Commit df5baa1

Browse files
boomanaiden154boomanaiden154
committed
rebase
Created using spr 1.3.6
2 parents b514cb1 + 869bce2 commit df5baa1

File tree

68 files changed

+1273
-1133
lines changed

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

68 files changed

+1273
-1133
lines changed

‎.github/workflows/premerge.yaml‎

Lines changed: 0 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -35,9 +35,6 @@ jobs:
3535
with:
3636
fetch-depth: 2
3737
- name: Build and Test
38-
# Mark the job as a success even if the step fails so that people do
39-
# not get notified while the new premerge pipeline is in an
40-
# experimental state.
4138
run: |
4239
git config --global --add safe.directory '*'
4340
@@ -109,9 +106,6 @@ jobs:
109106
echo "windows-projects=${projects_to_build}" >> $GITHUB_OUTPUT
110107
echo "windows-check-targets=${project_check_targets}" >> $GITHUB_OUTPUT
111108
- name: Build and Test
112-
# Mark the job as a success even if the step fails so that people do
113-
# not get notified while the new premerge pipeline is in an
114-
# experimental state.
115109
if: ${{ steps.vars.outputs.windows-projects != '' }}
116110
shell: cmd
117111
run: |

‎clang/include/clang/Basic/BuiltinsX86.td‎

Lines changed: 14 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -93,20 +93,23 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in {
9393
}
9494

9595
let Features = "sse2" in {
96-
def pmulhw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
9796
def pavgb128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>)">;
9897
def pavgw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
9998
def packsswb128 : X86Builtin<"_Vector<16, char>(_Vector<8, short>, _Vector<8, short>)">;
10099
def packssdw128 : X86Builtin<"_Vector<8, short>(_Vector<4, int>, _Vector<4, int>)">;
101100
def packuswb128 : X86Builtin<"_Vector<16, char>(_Vector<8, short>, _Vector<8, short>)">;
102-
def pmulhuw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
103101
def vec_ext_v2di : X86Builtin<"long long int(_Vector<2, long long int>, _Constant int)">;
104102
def vec_ext_v4si : X86Builtin<"int(_Vector<4, int>, _Constant int)">;
105103
def vec_ext_v4sf : X86Builtin<"float(_Vector<4, float>, _Constant int)">;
106104
def vec_ext_v8hi : X86Builtin<"short(_Vector<8, short>, _Constant int)">;
107105
def vec_set_v8hi : X86Builtin<"_Vector<8, short>(_Vector<8, short>, short, _Constant int)">;
108106
}
109107

108+
let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in {
109+
def pmulhw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">;
110+
def pmulhuw128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, unsigned short>, _Vector<8, unsigned short>)">;
111+
}
112+
110113
let Features = "sse3" in {
111114
foreach Op = ["addsub", "hadd", "hsub"] in {
112115
def Op#ps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>)">;
@@ -579,8 +582,6 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i
579582
def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">;
580583
def pmuldq256 : X86Builtin<"_Vector<4, long long int>(_Vector<8, int>, _Vector<8, int>)">;
581584
def pmulhrsw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
582-
def pmulhuw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
583-
def pmulhw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
584585
def pmuludq256 : X86Builtin<"_Vector<4, long long int>(_Vector<8, int>, _Vector<8, int>)">;
585586
def psadbw256 : X86Builtin<"_Vector<4, long long int>(_Vector<32, char>, _Vector<32, char>)">;
586587
def pshufb256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>)">;
@@ -619,6 +620,11 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i
619620
def insert128i256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<2, long long int>, _Constant int)">;
620621
}
621622

623+
let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in {
624+
def pmulhuw256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, unsigned short>, _Vector<16, unsigned short>)">;
625+
def pmulhw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">;
626+
}
627+
622628
let Features = "avx2", Attributes = [NoThrow, RequiredVectorWidth<256>] in {
623629
def maskloadd256 : X86Builtin<"_Vector<8, int>(_Vector<8, int const *>, _Vector<8, int>)">;
624630
def maskloadq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int const *>, _Vector<4, long long int>)">;
@@ -1429,7 +1435,10 @@ let Features = "avx512bitalg,evex512", Attributes = [NoThrow, Const, RequiredVec
14291435

14301436
let Features = "avx512bw,evex512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in {
14311437
def pmulhrsw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">;
1432-
def pmulhuw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">;
1438+
}
1439+
1440+
let Features = "avx512bw,evex512", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in {
1441+
def pmulhuw512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, unsigned short>, _Vector<32, unsigned short>)">;
14331442
def pmulhw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">;
14341443
}
14351444

‎clang/lib/AST/ExprConstant.cpp‎

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -11628,7 +11628,13 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1162811628
return Success(APValue(ResultElements.data(), ResultElements.size()), E);
1162911629
}
1163011630
case Builtin::BI__builtin_elementwise_add_sat:
11631-
case Builtin::BI__builtin_elementwise_sub_sat: {
11631+
case Builtin::BI__builtin_elementwise_sub_sat:
11632+
case clang::X86::BI__builtin_ia32_pmulhuw128:
11633+
case clang::X86::BI__builtin_ia32_pmulhuw256:
11634+
case clang::X86::BI__builtin_ia32_pmulhuw512:
11635+
case clang::X86::BI__builtin_ia32_pmulhw128:
11636+
case clang::X86::BI__builtin_ia32_pmulhw256:
11637+
case clang::X86::BI__builtin_ia32_pmulhw512: {
1163211638
APValue SourceLHS, SourceRHS;
1163311639
if (!EvaluateAsRValue(Info, E->getArg(0), SourceLHS) ||
1163411640
!EvaluateAsRValue(Info, E->getArg(1), SourceRHS))
@@ -11653,6 +11659,18 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) {
1165311659
APSInt(LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS),
1165411660
DestEltTy->isUnsignedIntegerOrEnumerationType())));
1165511661
break;
11662+
case clang::X86::BI__builtin_ia32_pmulhuw128:
11663+
case clang::X86::BI__builtin_ia32_pmulhuw256:
11664+
case clang::X86::BI__builtin_ia32_pmulhuw512:
11665+
ResultElements.push_back(APValue(APSInt(llvm::APIntOps::mulhu(LHS, RHS),
11666+
/*isUnsigned=*/true)));
11667+
break;
11668+
case clang::X86::BI__builtin_ia32_pmulhw128:
11669+
case clang::X86::BI__builtin_ia32_pmulhw256:
11670+
case clang::X86::BI__builtin_ia32_pmulhw512:
11671+
ResultElements.push_back(APValue(APSInt(llvm::APIntOps::mulhs(LHS, RHS),
11672+
/*isUnsigned=*/false)));
11673+
break;
1165611674
}
1165711675
}
1165811676

‎clang/lib/Headers/avx2intrin.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1729,10 +1729,10 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b)
17291729
/// \param __b
17301730
/// A 256-bit vector of [16 x i16] containing one of the source operands.
17311731
/// \returns A 256-bit vector of [16 x i16] containing the products.
1732-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
1732+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
17331733
_mm256_mulhi_epu16(__m256i __a, __m256i __b)
17341734
{
1735-
return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b);
1735+
return (__m256i)__builtin_ia32_pmulhuw256((__v16hu)__a, (__v16hu)__b);
17361736
}
17371737

17381738
/// Multiplies signed 16-bit integer elements of two 256-bit vectors of
@@ -1748,7 +1748,7 @@ _mm256_mulhi_epu16(__m256i __a, __m256i __b)
17481748
/// \param __b
17491749
/// A 256-bit vector of [16 x i16] containing one of the source operands.
17501750
/// \returns A 256-bit vector of [16 x i16] containing the products.
1751-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
1751+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
17521752
_mm256_mulhi_epi16(__m256i __a, __m256i __b)
17531753
{
17541754
return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b);
@@ -1767,7 +1767,7 @@ _mm256_mulhi_epi16(__m256i __a, __m256i __b)
17671767
/// \param __b
17681768
/// A 256-bit vector of [16 x i16] containing one of the source operands.
17691769
/// \returns A 256-bit vector of [16 x i16] containing the products.
1770-
static __inline__ __m256i __DEFAULT_FN_ATTRS256
1770+
static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR
17711771
_mm256_mullo_epi16(__m256i __a, __m256i __b)
17721772
{
17731773
return (__m256i)((__v16hu)__a * (__v16hu)__b);

‎clang/lib/Headers/avx512bwintrin.h‎

Lines changed: 14 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,14 @@ typedef unsigned long long __mmask64;
2525
__attribute__((__always_inline__, __nodebug__, \
2626
__target__("avx512bw,no-evex512")))
2727

28+
#if defined(__cplusplus) && (__cplusplus >= 201103L)
29+
#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr
30+
#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr
31+
#else
32+
#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512
33+
#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS
34+
#endif
35+
2836
static __inline __mmask32 __DEFAULT_FN_ATTRS
2937
_knot_mask32(__mmask32 __M)
3038
{
@@ -438,7 +446,7 @@ _mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) {
438446
(__v32hi)_mm512_setzero_si512());
439447
}
440448

441-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
449+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
442450
_mm512_mullo_epi16 (__m512i __A, __m512i __B) {
443451
return (__m512i) ((__v32hu) __A * (__v32hu) __B);
444452
}
@@ -1082,7 +1090,7 @@ _mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B)
10821090
(__v32hi)_mm512_setzero_si512());
10831091
}
10841092

1085-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
1093+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
10861094
_mm512_mulhi_epi16(__m512i __A, __m512i __B)
10871095
{
10881096
return (__m512i)__builtin_ia32_pmulhw512((__v32hi) __A, (__v32hi) __B);
@@ -1105,10 +1113,10 @@ _mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B)
11051113
(__v32hi)_mm512_setzero_si512());
11061114
}
11071115

1108-
static __inline__ __m512i __DEFAULT_FN_ATTRS512
1116+
static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
11091117
_mm512_mulhi_epu16(__m512i __A, __m512i __B)
11101118
{
1111-
return (__m512i)__builtin_ia32_pmulhuw512((__v32hi) __A, (__v32hi) __B);
1119+
return (__m512i)__builtin_ia32_pmulhuw512((__v32hu) __A, (__v32hu) __B);
11121120
}
11131121

11141122
static __inline__ __m512i __DEFAULT_FN_ATTRS512
@@ -2010,5 +2018,7 @@ _mm512_sad_epu8 (__m512i __A, __m512i __B)
20102018

20112019
#undef __DEFAULT_FN_ATTRS512
20122020
#undef __DEFAULT_FN_ATTRS
2021+
#undef __DEFAULT_FN_ATTRS512_CONSTEXPR
2022+
#undef __DEFAULT_FN_ATTRS_CONSTEXPR
20132023

20142024
#endif

‎clang/lib/Headers/avx512fintrin.h‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -277,20 +277,20 @@ _mm512_setzero_pd(void) {
277277
return __extension__(__m512d){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0};
278278
}
279279

280-
static __inline __m512 __DEFAULT_FN_ATTRS512
280+
static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR
281281
_mm512_set1_ps(float __w)
282282
{
283283
return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w,
284284
__w, __w, __w, __w, __w, __w, __w, __w };
285285
}
286286

287-
static __inline __m512d __DEFAULT_FN_ATTRS512
287+
static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR
288288
_mm512_set1_pd(double __w)
289289
{
290290
return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w };
291291
}
292292

293-
static __inline __m512i __DEFAULT_FN_ATTRS512
293+
static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
294294
_mm512_set1_epi8(char __w)
295295
{
296296
return __extension__ (__m512i)(__v64qi){
@@ -304,7 +304,7 @@ _mm512_set1_epi8(char __w)
304304
__w, __w, __w, __w, __w, __w, __w, __w };
305305
}
306306

307-
static __inline __m512i __DEFAULT_FN_ATTRS512
307+
static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
308308
_mm512_set1_epi16(short __w)
309309
{
310310
return __extension__ (__m512i)(__v32hi){

‎clang/lib/Headers/emmintrin.h‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -2394,8 +2394,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a,
23942394
/// A 128-bit signed [8 x i16] vector.
23952395
/// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of
23962396
/// each of the eight 32-bit products.
2397-
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
2398-
__m128i __b) {
2397+
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2398+
_mm_mulhi_epi16(__m128i __a, __m128i __b) {
23992399
return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b);
24002400
}
24012401

@@ -2413,9 +2413,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a,
24132413
/// A 128-bit unsigned [8 x i16] vector.
24142414
/// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits
24152415
/// of each of the eight 32-bit products.
2416-
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
2417-
__m128i __b) {
2418-
return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b);
2416+
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2417+
_mm_mulhi_epu16(__m128i __a, __m128i __b) {
2418+
return (__m128i)__builtin_ia32_pmulhuw128((__v8hu)__a, (__v8hu)__b);
24192419
}
24202420

24212421
/// Multiplies the corresponding elements of two signed [8 x i16]
@@ -2432,8 +2432,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a,
24322432
/// A 128-bit signed [8 x i16] vector.
24332433
/// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of
24342434
/// each of the eight 32-bit products.
2435-
static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a,
2436-
__m128i __b) {
2435+
static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR
2436+
_mm_mullo_epi16(__m128i __a, __m128i __b) {
24372437
return (__m128i)((__v8hu)__a * (__v8hu)__b);
24382438
}
24392439

‎clang/lib/Headers/mmintrin.h‎

Lines changed: 6 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -57,6 +57,9 @@ typedef char __v16qi __attribute__((__vector_size__(16)));
5757

5858
#define __trunc64(x) \
5959
(__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0)
60+
#define __zext128(x) \
61+
(__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \
62+
1, 2, 3)
6063
#define __anyext128(x) \
6164
(__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \
6265
1, -1, -1)
@@ -723,11 +726,11 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2)
723726
/// A 64-bit integer vector of [4 x i16].
724727
/// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits
725728
/// of the products of both parameters.
726-
static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
729+
static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
727730
_mm_mulhi_pi16(__m64 __m1, __m64 __m2)
728731
{
729-
return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__anyext128(__m1),
730-
(__v8hi)__anyext128(__m2)));
732+
return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__zext128(__m1),
733+
(__v8hi)__zext128(__m2)));
731734
}
732735

733736
/// Multiplies each 16-bit signed integer element of the first 64-bit

‎clang/lib/Headers/xmmintrin.h‎

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -24,6 +24,7 @@ typedef float __m128_u __attribute__((__vector_size__(16), __aligned__(1)));
2424

2525
/* Unsigned types */
2626
typedef unsigned int __v4su __attribute__((__vector_size__(16)));
27+
typedef unsigned short __v8hu __attribute__((__vector_size__(16)));
2728

2829
/* This header should only be included in a hosted environment as it depends on
2930
* a standard library to provide allocation routines. */
@@ -2447,11 +2448,11 @@ _mm_movemask_pi8(__m64 __a)
24472448
/// \param __b
24482449
/// A 64-bit integer vector containing one of the source operands.
24492450
/// \returns A 64-bit integer vector containing the products of both operands.
2450-
static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2
2451+
static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR
24512452
_mm_mulhi_pu16(__m64 __a, __m64 __b)
24522453
{
2453-
return __trunc64(__builtin_ia32_pmulhuw128((__v8hi)__anyext128(__a),
2454-
(__v8hi)__anyext128(__b)));
2454+
return __trunc64(__builtin_ia32_pmulhuw128((__v8hu)__zext128(__a),
2455+
(__v8hu)__zext128(__b)));
24552456
}
24562457

24572458
/// Shuffles the 4 16-bit integers from a 64-bit integer vector to the

‎clang/test/CMakeLists.txt‎

Lines changed: 0 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -26,7 +26,6 @@ llvm_canonicalize_cmake_booleans(
2626
PPC_LINUX_DEFAULT_IEEELONGDOUBLE
2727
LLVM_TOOL_LLVM_DRIVER_BUILD
2828
LLVM_INCLUDE_SPIRV_TOOLS_TESTS
29-
LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS
3029
)
3130

3231
# Run tests requiring Z3 headers only if LLVM was built with Z3

0 commit comments

Comments
 (0)