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‎llvm/test/CodeGen/Hexagon/loop_align_count.ll‎

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; RUN: llc -mtriple=hexagon -mcpu=hexagonv73 -O2 -mattr=+hvxv73,hvx-length64b \
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; RUN: -debug-only=hexagon-loop-align 2>&1 < %s | FileCheck %s
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; Validate that there are 4 bundles in the loop.
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; REQUIRES: asserts
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; CHECK: Loop Align Pass:
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; CHECK: Bundle Count : 4
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; CHECK: .p2align{{.*}}5
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; Function Attrs: nounwind
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define void @ham(ptr noalias nocapture readonly %arg, i32 %arg1, i32 %arg2, i32 %arg3, ptr noalias nocapture %arg4, i32 %arg5) #0 {
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bb:
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%ashr = ashr i32 %arg3, 2
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%ashr6 = ashr i32 %arg3, 1
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%add = add nsw i32 %ashr6, %ashr
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%icmp = icmp sgt i32 %arg2, 0
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br i1 %icmp, label %bb7, label %bb61
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bb7: ; preds = %bb
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%sdiv = sdiv i32 %arg1, 64
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%icmp8 = icmp sgt i32 %arg1, 63
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br label %bb9
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bb9: ; preds = %bb57, %bb7
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%phi = phi i32 [ 0, %bb7 ], [ %add58, %bb57 ]
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%ashr10 = ashr exact i32 %phi, 1
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%mul = mul nsw i32 %ashr10, %arg3
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br i1 %icmp8, label %bb11, label %bb57
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bb11: ; preds = %bb9
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%add12 = add nsw i32 %phi, 1
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%mul13 = mul nsw i32 %add12, %arg5
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%mul14 = mul nsw i32 %phi, %arg5
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%add15 = add i32 %add, %mul
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%add16 = add i32 %mul, %ashr
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%add17 = add i32 %mul, %ashr6
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%getelementptr = getelementptr inbounds i8, ptr %arg4, i32 %mul13
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%getelementptr18 = getelementptr inbounds i8, ptr %arg4, i32 %mul14
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%getelementptr19 = getelementptr inbounds i16, ptr %arg, i32 %add15
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%getelementptr20 = getelementptr inbounds i16, ptr %arg, i32 %add16
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%getelementptr21 = getelementptr inbounds i16, ptr %arg, i32 %add17
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%getelementptr22 = getelementptr inbounds i16, ptr %arg, i32 %mul
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%bitcast = bitcast ptr %getelementptr to ptr
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%bitcast23 = bitcast ptr %getelementptr18 to ptr
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%bitcast24 = bitcast ptr %getelementptr19 to ptr
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%bitcast25 = bitcast ptr %getelementptr20 to ptr
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%bitcast26 = bitcast ptr %getelementptr21 to ptr
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%bitcast27 = bitcast ptr %getelementptr22 to ptr
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br label %bb28
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bb28: ; preds = %bb28, %bb11
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%phi29 = phi i32 [ 0, %bb11 ], [ %add54, %bb28 ]
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%phi30 = phi ptr [ %bitcast27, %bb11 ], [ %getelementptr36, %bb28 ]
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%phi31 = phi ptr [ %bitcast26, %bb11 ], [ %getelementptr37, %bb28 ]
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%phi32 = phi ptr [ %bitcast25, %bb11 ], [ %getelementptr39, %bb28 ]
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%phi33 = phi ptr [ %bitcast24, %bb11 ], [ %getelementptr41, %bb28 ]
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%phi34 = phi ptr [ %bitcast, %bb11 ], [ %getelementptr53, %bb28 ]
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%phi35 = phi ptr [ %bitcast23, %bb11 ], [ %getelementptr52, %bb28 ]
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%getelementptr36 = getelementptr inbounds <16 x i32>, ptr %phi30, i32 1
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%load = load <16 x i32>, ptr %phi30, align 64
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%getelementptr37 = getelementptr inbounds <16 x i32>, ptr %phi31, i32 1
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%load38 = load <16 x i32>, ptr %phi31, align 64
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%getelementptr39 = getelementptr inbounds <16 x i32>, ptr %phi32, i32 1
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%load40 = load <16 x i32>, ptr %phi32, align 64
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%getelementptr41 = getelementptr inbounds <16 x i32>, ptr %phi33, i32 1
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%load42 = load <16 x i32>, ptr %phi33, align 64
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%call = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %load, <16 x i32> %load38)
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%call43 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %load, <16 x i32> %load38)
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%call44 = tail call <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32> %load40, <16 x i32> %load42)
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%call45 = tail call <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32> %load40, <16 x i32> %load42)
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%call46 = tail call <16 x i32> @llvm.hexagon.V6.vavgh(<16 x i32> %call, <16 x i32> %call44)
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%call47 = tail call <16 x i32> @llvm.hexagon.V6.vnavgh(<16 x i32> %call, <16 x i32> %call44)
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%call48 = tail call <16 x i32> @llvm.hexagon.V6.vavgh(<16 x i32> %call43, <16 x i32> %call45)
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%call49 = tail call <16 x i32> @llvm.hexagon.V6.vnavgh(<16 x i32> %call43, <16 x i32> %call45)
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%call50 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %call47, <16 x i32> %call46)
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%call51 = tail call <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32> %call49, <16 x i32> %call48)
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%getelementptr52 = getelementptr inbounds <16 x i32>, ptr %phi35, i32 1
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store <16 x i32> %call50, ptr %phi35, align 64
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%getelementptr53 = getelementptr inbounds <16 x i32>, ptr %phi34, i32 1
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store <16 x i32> %call51, ptr %phi34, align 64
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%add54 = add nsw i32 %phi29, 1
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%icmp55 = icmp slt i32 %add54, %sdiv
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br i1 %icmp55, label %bb28, label %bb56
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bb56: ; preds = %bb28
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br label %bb57
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bb57: ; preds = %bb56, %bb9
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%add58 = add nsw i32 %phi, 2
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%icmp59 = icmp slt i32 %add58, %arg2
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br i1 %icmp59, label %bb9, label %bb60
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bb60: ; preds = %bb57
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br label %bb61
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bb61: ; preds = %bb60, %bb
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ret void
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}
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; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
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declare <16 x i32> @llvm.hexagon.V6.vaddh(<16 x i32>, <16 x i32>) #1
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; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
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declare <16 x i32> @llvm.hexagon.V6.vsubh(<16 x i32>, <16 x i32>) #1
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; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
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declare <16 x i32> @llvm.hexagon.V6.vavgh(<16 x i32>, <16 x i32>) #1
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; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
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declare <16 x i32> @llvm.hexagon.V6.vnavgh(<16 x i32>, <16 x i32>) #1
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; Function Attrs: nocallback nofree nosync nounwind willreturn memory(none)
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declare <16 x i32> @llvm.hexagon.V6.vsathub(<16 x i32>, <16 x i32>) #1
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attributes #0 = { nounwind "less-precise-fpmad"="false" "no-frame-pointer-elim"="true" "no-frame-pointer-elim-non-leaf" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nocallback nofree nosync nounwind willreturn memory(none) }

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