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JDevlieghereJDevlieghere
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[lldb] Support riscv32 ELF corefiles (#115408)
Add support for riscv32 ELF corefiles.
1 parent 050e49a commit dfabd61

11 files changed

+693
-6
lines changed

‎lldb/source/Plugins/Process/Utility/CMakeLists.txt‎

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@@ -43,6 +43,7 @@ add_lldb_library(lldbPluginProcessUtility
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RegisterContextPOSIX_arm64.cpp
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RegisterContextPOSIX_loongarch64.cpp
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RegisterContextPOSIX_mips64.cpp
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RegisterContextPOSIX_riscv32.cpp
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RegisterContextPOSIX_powerpc.cpp
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RegisterContextPOSIX_ppc64le.cpp
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RegisterContextPOSIX_riscv64.cpp
@@ -57,6 +58,7 @@ add_lldb_library(lldbPluginProcessUtility
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RegisterInfoPOSIX_arm64.cpp
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RegisterInfoPOSIX_loongarch64.cpp
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RegisterInfoPOSIX_ppc64le.cpp
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RegisterInfoPOSIX_riscv32.cpp
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RegisterInfoPOSIX_riscv64.cpp
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StopInfoMachException.cpp
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ThreadMemory.cpp

‎lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv32.cpp‎

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//===-- RegisterContextPOSIX_riscv32.cpp ------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "RegisterContextPOSIX_riscv32.h"
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#include "lldb/Target/Process.h"
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#include "lldb/Target/Target.h"
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#include "lldb/Target/Thread.h"
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#include "lldb/Utility/DataBufferHeap.h"
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#include "lldb/Utility/DataExtractor.h"
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#include "lldb/Utility/Endian.h"
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#include "lldb/Utility/RegisterValue.h"
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#include "lldb/Utility/Scalar.h"
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#include "llvm/Support/Compiler.h"
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using namespace lldb;
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using namespace lldb_private;
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RegisterContextPOSIX_riscv32::RegisterContextPOSIX_riscv32(
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lldb_private::Thread &thread,
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std::unique_ptr<RegisterInfoPOSIX_riscv32> register_info)
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: lldb_private::RegisterContext(thread, 0),
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m_register_info_up(std::move(register_info)) {}
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RegisterContextPOSIX_riscv32::~RegisterContextPOSIX_riscv32() = default;
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void RegisterContextPOSIX_riscv32::invalidate() {}
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void RegisterContextPOSIX_riscv32::InvalidateAllRegisters() {}
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size_t RegisterContextPOSIX_riscv32::GetRegisterCount() {
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return m_register_info_up->GetRegisterCount();
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}
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size_t RegisterContextPOSIX_riscv32::GetGPRSize() {
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return m_register_info_up->GetGPRSize();
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}
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unsigned RegisterContextPOSIX_riscv32::GetRegisterSize(unsigned int reg) {
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return m_register_info_up->GetRegisterInfo()[reg].byte_size;
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}
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unsigned RegisterContextPOSIX_riscv32::GetRegisterOffset(unsigned int reg) {
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return m_register_info_up->GetRegisterInfo()[reg].byte_offset;
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}
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const lldb_private::RegisterInfo *
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RegisterContextPOSIX_riscv32::GetRegisterInfoAtIndex(size_t reg) {
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if (reg < GetRegisterCount())
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return &GetRegisterInfo()[reg];
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return nullptr;
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}
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size_t RegisterContextPOSIX_riscv32::GetRegisterSetCount() {
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return m_register_info_up->GetRegisterCount();
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}
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const lldb_private::RegisterSet *
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RegisterContextPOSIX_riscv32::GetRegisterSet(size_t set) {
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return m_register_info_up->GetRegisterSet(set);
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}
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const lldb_private::RegisterInfo *
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RegisterContextPOSIX_riscv32::GetRegisterInfo() {
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return m_register_info_up->GetRegisterInfo();
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}
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bool RegisterContextPOSIX_riscv32::IsGPR(unsigned int reg) {
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return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_riscv32::eRegsetMaskDefault;
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}
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bool RegisterContextPOSIX_riscv32::IsFPR(unsigned int reg) {
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return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
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RegisterInfoPOSIX_riscv32::eRegsetMaskFP;
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}

‎lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv32.h‎

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//===-- RegisterContextPOSIX_riscv32.h --------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV32_H
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#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV32_H
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#include "RegisterInfoInterface.h"
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#include "RegisterInfoPOSIX_riscv32.h"
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#include "lldb-riscv-register-enums.h"
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#include "lldb/Target/RegisterContext.h"
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#include "lldb/Utility/Log.h"
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class RegisterContextPOSIX_riscv32 : public lldb_private::RegisterContext {
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public:
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RegisterContextPOSIX_riscv32(
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lldb_private::Thread &thread,
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std::unique_ptr<RegisterInfoPOSIX_riscv32> register_info);
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~RegisterContextPOSIX_riscv32() override;
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void invalidate();
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void InvalidateAllRegisters() override;
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size_t GetRegisterCount() override;
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virtual size_t GetGPRSize();
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virtual unsigned GetRegisterSize(unsigned reg);
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virtual unsigned GetRegisterOffset(unsigned reg);
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const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
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size_t GetRegisterSetCount() override;
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const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
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protected:
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std::unique_ptr<RegisterInfoPOSIX_riscv32> m_register_info_up;
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virtual const lldb_private::RegisterInfo *GetRegisterInfo();
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bool IsGPR(unsigned reg);
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bool IsFPR(unsigned reg);
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size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_riscv32::FPR); }
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uint32_t GetRegNumFCSR() const { return fpr_fcsr_riscv; }
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virtual bool ReadGPR() = 0;
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virtual bool ReadFPR() = 0;
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virtual bool WriteGPR() = 0;
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virtual bool WriteFPR() = 0;
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};
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#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV32_H

‎lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.cpp‎

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//===-- RegisterInfoPOSIX_riscv32.cpp -------------------------------------===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===---------------------------------------------------------------------===//
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#include "RegisterInfoPOSIX_riscv32.h"
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#include "lldb/Utility/Flags.h"
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#include "lldb/lldb-defines.h"
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#include "llvm/Support/Compiler.h"
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#include <cassert>
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#include <stddef.h>
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#define GPR_OFFSET(idx) ((idx) * 4 + 0)
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#define FPR_OFFSET(idx) ((idx) * 4 + sizeof(RegisterInfoPOSIX_riscv32::GPR))
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#define REG_CONTEXT_SIZE \
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(sizeof(RegisterInfoPOSIX_riscv32::GPR) + \
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sizeof(RegisterInfoPOSIX_riscv32::FPR))
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#define DECLARE_REGISTER_INFOS_RISCV32_STRUCT
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#include "RegisterInfos_riscv32.h"
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#undef DECLARE_REGISTER_INFOS_RISCV32_STRUCT
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const lldb_private::RegisterInfo *RegisterInfoPOSIX_riscv32::GetRegisterInfoPtr(
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const lldb_private::ArchSpec &target_arch) {
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switch (target_arch.GetMachine()) {
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case llvm::Triple::riscv32:
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return g_register_infos_riscv32_le;
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default:
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assert(false && "Unhandled target architecture.");
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return nullptr;
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}
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}
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uint32_t RegisterInfoPOSIX_riscv32::GetRegisterInfoCount(
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const lldb_private::ArchSpec &target_arch) {
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switch (target_arch.GetMachine()) {
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case llvm::Triple::riscv32:
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return static_cast<uint32_t>(sizeof(g_register_infos_riscv32_le) /
44+
sizeof(g_register_infos_riscv32_le[0]));
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default:
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assert(false && "Unhandled target architecture.");
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return 0;
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}
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}
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// Number of register sets provided by this context.
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enum {
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k_num_gpr_registers = gpr_last_riscv - gpr_first_riscv + 1,
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k_num_fpr_registers = fpr_last_riscv - fpr_first_riscv + 1,
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k_num_register_sets = 2
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};
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// RISC-V32 general purpose registers.
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static const uint32_t g_gpr_regnums_riscv32[] = {
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gpr_pc_riscv, gpr_ra_riscv, gpr_sp_riscv, gpr_x3_riscv,
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gpr_x4_riscv, gpr_x5_riscv, gpr_x6_riscv, gpr_x7_riscv,
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gpr_fp_riscv, gpr_x9_riscv, gpr_x10_riscv, gpr_x11_riscv,
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gpr_x12_riscv, gpr_x13_riscv, gpr_x14_riscv, gpr_x15_riscv,
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gpr_x16_riscv, gpr_x17_riscv, gpr_x18_riscv, gpr_x19_riscv,
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gpr_x20_riscv, gpr_x21_riscv, gpr_x22_riscv, gpr_x23_riscv,
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gpr_x24_riscv, gpr_x25_riscv, gpr_x26_riscv, gpr_x27_riscv,
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gpr_x28_riscv, gpr_x29_riscv, gpr_x30_riscv, gpr_x31_riscv,
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gpr_x0_riscv, LLDB_INVALID_REGNUM};
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static_assert(((sizeof g_gpr_regnums_riscv32 /
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sizeof g_gpr_regnums_riscv32[0]) -
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1) == k_num_gpr_registers,
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"g_gpr_regnums_riscv32 has wrong number of register infos");
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// RISC-V32 floating point registers.
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static const uint32_t g_fpr_regnums_riscv32[] = {
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fpr_f0_riscv, fpr_f1_riscv, fpr_f2_riscv, fpr_f3_riscv,
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fpr_f4_riscv, fpr_f5_riscv, fpr_f6_riscv, fpr_f7_riscv,
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fpr_f8_riscv, fpr_f9_riscv, fpr_f10_riscv, fpr_f11_riscv,
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fpr_f12_riscv, fpr_f13_riscv, fpr_f14_riscv, fpr_f15_riscv,
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fpr_f16_riscv, fpr_f17_riscv, fpr_f18_riscv, fpr_f19_riscv,
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fpr_f20_riscv, fpr_f21_riscv, fpr_f22_riscv, fpr_f23_riscv,
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fpr_f24_riscv, fpr_f25_riscv, fpr_f26_riscv, fpr_f27_riscv,
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fpr_f28_riscv, fpr_f29_riscv, fpr_f30_riscv, fpr_f31_riscv,
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fpr_fcsr_riscv, LLDB_INVALID_REGNUM};
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static_assert(((sizeof g_fpr_regnums_riscv32 /
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sizeof g_fpr_regnums_riscv32[0]) -
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1) == k_num_fpr_registers,
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"g_fpr_regnums_riscv32 has wrong number of register infos");
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// Register sets for RISC-V32.
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static const lldb_private::RegisterSet g_reg_sets_riscv32[k_num_register_sets] =
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{{"General Purpose Registers", "gpr", k_num_gpr_registers,
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g_gpr_regnums_riscv32},
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{"Floating Point Registers", "fpr", k_num_fpr_registers,
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g_fpr_regnums_riscv32}};
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RegisterInfoPOSIX_riscv32::RegisterInfoPOSIX_riscv32(
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const lldb_private::ArchSpec &target_arch, lldb_private::Flags opt_regsets)
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: lldb_private::RegisterInfoAndSetInterface(target_arch),
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m_register_info_p(GetRegisterInfoPtr(target_arch)),
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m_register_info_count(GetRegisterInfoCount(target_arch)),
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m_opt_regsets(opt_regsets) {}
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uint32_t RegisterInfoPOSIX_riscv32::GetRegisterCount() const {
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return m_register_info_count;
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}
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size_t RegisterInfoPOSIX_riscv32::GetGPRSize() const {
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return sizeof(struct RegisterInfoPOSIX_riscv32::GPR);
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}
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size_t RegisterInfoPOSIX_riscv32::GetFPRSize() const {
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return sizeof(struct RegisterInfoPOSIX_riscv32::FPR);
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}
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const lldb_private::RegisterInfo *
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RegisterInfoPOSIX_riscv32::GetRegisterInfo() const {
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return m_register_info_p;
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}
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size_t RegisterInfoPOSIX_riscv32::GetRegisterSetCount() const {
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return k_num_register_sets;
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}
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size_t RegisterInfoPOSIX_riscv32::GetRegisterSetFromRegisterIndex(
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uint32_t reg_index) const {
129+
// coverity[unsigned_compare]
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if (reg_index >= gpr_first_riscv && reg_index <= gpr_last_riscv)
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return eRegsetMaskDefault;
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if (reg_index >= fpr_first_riscv && reg_index <= fpr_last_riscv)
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return eRegsetMaskFP;
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return LLDB_INVALID_REGNUM;
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}
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const lldb_private::RegisterSet *
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RegisterInfoPOSIX_riscv32::GetRegisterSet(size_t set_index) const {
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if (set_index < GetRegisterSetCount())
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return &g_reg_sets_riscv32[set_index];
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return nullptr;
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}

‎lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv32.h‎

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//===-- RegisterInfoPOSIX_riscv32.h -----------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4+
// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_RISCV32_H
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#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_RISCV32_H
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#include "RegisterInfoAndSetInterface.h"
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#include "lldb/Target/RegisterContext.h"
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#include "lldb/Utility/Flags.h"
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#include "lldb/lldb-private.h"
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#include <map>
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class RegisterInfoPOSIX_riscv32
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: public lldb_private::RegisterInfoAndSetInterface {
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public:
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static const lldb_private::RegisterInfo *
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GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch);
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static uint32_t
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GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch);
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public:
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// RISC-V32 register set mask value
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enum {
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eRegsetMaskDefault = 0,
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eRegsetMaskFP = 1,
32+
eRegsetMaskAll = -1,
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};
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struct GPR {
36+
// gpr[0] is pc, not x0, which is the zero register.
37+
uint32_t gpr[32];
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};
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struct FPR {
41+
uint32_t fpr[32];
42+
uint32_t fcsr;
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};
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RegisterInfoPOSIX_riscv32(const lldb_private::ArchSpec &target_arch,
46+
lldb_private::Flags flags);
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size_t GetGPRSize() const override;
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size_t GetFPRSize() const override;
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const lldb_private::RegisterInfo *GetRegisterInfo() const override;
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uint32_t GetRegisterCount() const override;
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const lldb_private::RegisterSet *
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GetRegisterSet(size_t reg_set) const override;
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size_t GetRegisterSetCount() const override;
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size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
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bool IsFPPresent() const { return m_opt_regsets.AnySet(eRegsetMaskFP); }
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private:
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const lldb_private::RegisterInfo *m_register_info_p;
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uint32_t m_register_info_count;
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lldb_private::Flags m_opt_regsets;
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};
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#endif

‎lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp‎

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@@ -6,14 +6,13 @@
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//
77
//===---------------------------------------------------------------------===//
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9-
#include <cassert>
10-
#include <lldb/Utility/Flags.h>
11-
#include <stddef.h>
12-
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#include "RegisterInfoPOSIX_riscv64.h"
10+
#include "lldb/Utility/Flags.h"
1311
#include "lldb/lldb-defines.h"
1412
#include "llvm/Support/Compiler.h"
1513

16-
#include "RegisterInfoPOSIX_riscv64.h"
14+
#include <cassert>
15+
#include <stddef.h>
1716

1817
#define GPR_OFFSET(idx) ((idx)*8 + 0)
1918
#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))

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