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Add TODO and failing test case
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mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp

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@@ -68,6 +68,11 @@ namespace {
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///
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/// Since the 24x24 matrix is divided into 8x8 distribution units, there will be
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/// 9 distribution units (3x3) in total. Hence the 9 subgroup level operations.
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/// The pass currently has entire distribution logic in the WgToSgCreateNdOp
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/// pattern and all the other ops just follow.
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/// TODO: Decouple the distribution logic from WgToSgCreateNdOp for all the
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/// ops in the pass.
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struct WgToSgCreateNdOp : public OpConversionPattern<xegpu::CreateNdDescOp> {
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using OpConversionPattern<xegpu::CreateNdDescOp>::OpConversionPattern;
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mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir

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@@ -121,4 +121,13 @@ gpu.func @test_dpas(%a: memref<24x32xf32>, %b: memref<32x24xf32>) {
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: !xegpu.tensor_desc<24x32xf32, #xegpu.layout<sg_layout = [2, 4], sg_data = [12, 8], lane_layout = [2, 8], lane_data = [1, 1]>>
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gpu.return
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}
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}
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// CHECK-LABEL: test_dpas_with_no_create_nd_desc
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gpu.func @test_dpas_with_no_create_nd_desc(%a: vector<24x32xf32>, %b: vector<32x24xf32>) {
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// CHECK-NOT: vector<12x12xf32>
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%dpas = xegpu.dpas %a, %b
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{layout = #xegpu.layout<sg_layout = [2, 2], sg_data = [12, 12], lane_layout = [2, 2], lane_data = [1, 1]>}
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: vector<24x32xf32>, vector<32x24xf32> -> vector<24x24xf32>
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gpu.return
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}
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}

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