@@ -798,8 +798,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiassph_bf8(
798798
799799/// Convert 256-bit vector \a __B containing packed FP16 floating-point elements
800800/// to FP8 E5M2 numbers, using conversion biases stored in lower 8 bits of each
801- /// 16-bit integer stored in \a __B. Results are saturated. Merging mask \a __U
802- /// is used to determine if given element should be taken from \a __W instead.
801+ /// 16-bit integer stored in \a __B. Results are saturated. Zeroing mask \a __U
802+ /// is used to determine if given element should be zeroed instead.
803803///
804804/// \code{.operation}
805805/// FOR i := 0 to 15
@@ -1014,8 +1014,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiasph_hf8(
10141014
10151015/// Convert 256-bit vector \a __B containing packed FP16 floating-point elements
10161016/// to FP8 E4M3 numbers, using conversion biases stored in lower 8 bits of each
1017- /// 16-bit integer stored in \a __B. Merging mask \a __U is used to determine if
1018- /// given element should be taken from \a __W instead.
1017+ /// 16-bit integer stored in \a __B. Zeroing mask \a __U is used to determine if
1018+ /// given element should be taken zeroed instead.
10191019///
10201020/// \code{.operation}
10211021/// FOR i := 0 to 15
@@ -1230,8 +1230,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS256 _mm256_mask_cvtbiassph_hf8(
12301230
12311231/// Convert 256-bit vector \a __B containing packed FP16 floating-point elements
12321232/// to FP8 E4M3 numbers, using conversion biases stored in lower 8 bits of each
1233- /// 16-bit integer stored in \a __B. Results are saturated. Merging mask \a __U
1234- /// is used to determine if given element should be taken from \a __W instead.
1233+ /// 16-bit integer stored in \a __B. Results are saturated. Zeroing mask \a __U
1234+ /// is used to determine if given element should be zeroed instead.
12351235///
12361236/// \code{.operation}
12371237/// FOR i := 0 to 15
@@ -1465,7 +1465,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvt2ph_bf8(
14651465
14661466/// Convert two 256-bit vectors, \a __A and \a __B, containing packed FP16
14671467/// floating-point elements to a 256-bit vector containing E5M2 FP8 elements.
1468- /// Merging mask \a __U is used to determine if given element should be zeroed
1468+ /// Zeroing mask \a __U is used to determine if given element should be zeroed
14691469/// instead.
14701470///
14711471/// \code{.operation}
@@ -1707,7 +1707,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvts2ph_bf8(
17071707
17081708/// Convert two 256-bit vectors, \a __A and \a __B, containing packed FP16
17091709/// floating-point elements to a 256-bit vector containing E5M2 FP8 elements.
1710- /// Merging mask \a __U is used to determine if given element should be zeroed
1710+ /// Zeroing mask \a __U is used to determine if given element should be zeroed
17111711/// instead. Resulting elements are saturated in case of overflow.
17121712///
17131713/// \code{.operation}
@@ -1947,7 +1947,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvt2ph_hf8(
19471947
19481948/// Convert two 256-bit vectors, \a __A and \a __B, containing packed FP16
19491949/// floating-point elements to a 256-bit vector containing E4M3 FP8 elements.
1950- /// Merging mask \a __U is used to determine if given element should be zeroed
1950+ /// Zeroing mask \a __U is used to determine if given element should be zeroed
19511951/// instead.
19521952///
19531953/// \code{.operation}
@@ -2189,7 +2189,7 @@ static __inline__ __m256i __DEFAULT_FN_ATTRS256 _mm256_mask_cvts2ph_hf8(
21892189
21902190/// Convert two 256-bit vectors, \a __A and \a __B, containing packed FP16
21912191/// floating-point elements to a 256-bit vector containing E4M3 FP8 elements.
2192- /// Merging mask \a __U is used to determine if given element should be zeroed
2192+ /// Zeroing mask \a __U is used to determine if given element should be zeroed
21932193/// instead. Resulting elements are saturated in case of overflow.
21942194///
21952195/// \code{.operation}
@@ -2411,7 +2411,7 @@ _mm256_mask_cvthf8_ph(__m256h __W, __mmask16 __U, __m128i __A) {
24112411/// This intrinsic corresponds to the \c VCVTHF82PH instruction.
24122412///
24132413/// \param __U
2414- /// A 16-bit merging mask.
2414+ /// A 16-bit zeroing mask.
24152415/// \param __A
24162416/// A 256-bit vector of [32 x hf8].
24172417/// \returns
@@ -2509,7 +2509,7 @@ _mm_mask_cvtph_bf8(__m128i __W, __mmask8 __U, __m128h __A) {
25092509/// This intrinsic corresponds to the \c VCVTPH2BF8 instruction.
25102510///
25112511/// \param __U
2512- /// A 8-bit merging mask.
2512+ /// A 8-bit zeroing mask.
25132513/// \param __A
25142514/// A 128-bit vector of [8 x fp16].
25152515/// \returns
@@ -2605,7 +2605,7 @@ _mm256_mask_cvtph_bf8(__m128i __W, __mmask16 __U, __m256h __A) {
26052605/// This intrinsic corresponds to the \c VCVTPH2BF8 instruction.
26062606///
26072607/// \param __U
2608- /// A 16-bit merging mask.
2608+ /// A 16-bit zeroing mask.
26092609/// \param __A
26102610/// A 256-bit vector of [16 x fp16].
26112611/// \returns
@@ -2703,7 +2703,7 @@ _mm_mask_cvtsph_bf8(__m128i __W, __mmask8 __U, __m128h __A) {
27032703/// This intrinsic corresponds to the \c VCVTPH2BF8S instruction.
27042704///
27052705/// \param __U
2706- /// A 8-bit merging mask.
2706+ /// A 8-bit zeroing mask.
27072707/// \param __A
27082708/// A 128-bit vector of [8 x fp16].
27092709/// \returns
@@ -2801,7 +2801,7 @@ _mm256_mask_cvtsph_bf8(__m128i __W, __mmask16 __U, __m256h __A) {
28012801/// This intrinsic corresponds to the \c VCVTPH2BF8S instruction.
28022802///
28032803/// \param __U
2804- /// A 16-bit merging mask.
2804+ /// A 16-bit zeroing mask.
28052805/// \param __A
28062806/// A 256-bit vector of [16 x fp16].
28072807/// \returns
@@ -2899,7 +2899,7 @@ _mm_mask_cvtph_hf8(__m128i __W, __mmask8 __U, __m128h __A) {
28992899/// This intrinsic corresponds to the \c VCVTPH2HF8 instruction.
29002900///
29012901/// \param __U
2902- /// A 8-bit merging mask.
2902+ /// A 8-bit zeroing mask.
29032903/// \param __A
29042904/// A 128-bit vector of [8 x fp16].
29052905/// \returns
@@ -2995,7 +2995,7 @@ _mm256_mask_cvtph_hf8(__m128i __W, __mmask16 __U, __m256h __A) {
29952995/// This intrinsic corresponds to the \c VCVTPH2HF8 instruction.
29962996///
29972997/// \param __U
2998- /// A 16-bit merging mask.
2998+ /// A 16-bit zeroing mask.
29992999/// \param __A
30003000/// A 256-bit vector of [16 x fp16].
30013001/// \returns
@@ -3093,7 +3093,7 @@ _mm_mask_cvtsph_hf8(__m128i __W, __mmask8 __U, __m128h __A) {
30933093/// This intrinsic corresponds to the \c VCVTPH2HF8S instruction.
30943094///
30953095/// \param __U
3096- /// A 8-bit merging mask.
3096+ /// A 8-bit zeroing mask.
30973097/// \param __A
30983098/// A 128-bit vector of [8 x fp16].
30993099/// \returns
@@ -3191,7 +3191,7 @@ _mm256_mask_cvtsph_hf8(__m128i __W, __mmask16 __U, __m256h __A) {
31913191/// This intrinsic corresponds to the \c VCVTPH2HF8S instruction.
31923192///
31933193/// \param __U
3194- /// A 16-bit merging mask.
3194+ /// A 16-bit zeroing mask.
31953195/// \param __A
31963196/// A 256-bit vector of [16 x fp16].
31973197/// \returns
@@ -3370,7 +3370,7 @@ _mm256_mask_cvtbf8_ph(__m256h __W, __mmask16 __U, __m128i __A) {
33703370/// This intrinsic does not correspond to a single instruction.
33713371///
33723372/// \param __U
3373- /// A 16-bit merging mask.
3373+ /// A 16-bit zeroing mask.
33743374/// \param __A
33753375/// A 256-bit vector of [32 x bf8].
33763376/// \returns
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