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[RISCV] Precommit test coverage for pr118873
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‎llvm/test/CodeGen/RISCV/rvv/splat-vectors.ll

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@@ -105,3 +105,147 @@ define <vscale x 4 x float> @splat_idx_nxv4f32(<vscale x 4 x float> %v, i64 %idx
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%splat = shufflevector <vscale x 4 x float> %ins, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x float> %splat
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}
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define <vscale x 8 x float> @splat_idx_nxv4f32_nxv8f32(<vscale x 4 x float> %v, i64 %idx) {
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; CHECK-LABEL: splat_idx_nxv4f32_nxv8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e32, m4, ta, ma
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; CHECK-NEXT: vrgather.vx v12, v8, a0
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; CHECK-NEXT: vmv.v.v v8, v12
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 4 x float> %v, i64 %idx
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%ins = insertelement <vscale x 8 x float> poison, float %x, i32 0
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%splat = shufflevector <vscale x 8 x float> %ins, <vscale x 8 x float> poison, <vscale x 8 x i32> zeroinitializer
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ret <vscale x 8 x float> %splat
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}
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define <vscale x 4 x float> @splat_idx_v4f32_nxv4f32(<4 x float> %v, i64 %idx) {
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; CHECK-LABEL: splat_idx_v4f32_nxv4f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a1, zero, e32, m2, ta, ma
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; CHECK-NEXT: vrgather.vx v10, v8, a0
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%x = extractelement <4 x float> %v, i64 %idx
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%ins = insertelement <vscale x 4 x float> poison, float %x, i32 0
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%splat = shufflevector <vscale x 4 x float> %ins, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x float> %splat
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}
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; Negative test, scale could have a value > 2
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define <8 x float> @splat_idx_nxv4f32_v8f32(<vscale x 4 x float> %v, i64 %idx) {
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; CHECK-LABEL: splat_idx_nxv4f32_v8f32:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, ma
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; CHECK-NEXT: vslidedown.vx v8, v8, a0
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; CHECK-NEXT: vfmv.f.s fa5, v8
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa5
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 4 x float> %v, i64 %idx
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%ins = insertelement <8 x float> poison, float %x, i32 0
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%splat = shufflevector <8 x float> %ins, <8 x float> poison, <8 x i32> zeroinitializer
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ret <8 x float> %splat
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}
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define <vscale x 4 x float> @splat_idx_nxv8f32_nxv4f32_constant_0(<vscale x 8 x float> %v) {
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; CHECK-LABEL: splat_idx_nxv8f32_nxv4f32_constant_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e32, m2, ta, ma
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; CHECK-NEXT: vrgather.vi v10, v8, 0
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; CHECK-NEXT: vmv.v.v v8, v10
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 8 x float> %v, i64 0
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%ins = insertelement <vscale x 4 x float> poison, float %x, i32 0
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%splat = shufflevector <vscale x 4 x float> %ins, <vscale x 4 x float> poison, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x float> %splat
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}
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define <vscale x 4 x i8> @splat_idx_nxv8i8_nxv4i8_constant_0(<vscale x 8 x i8> %v) {
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; CHECK-LABEL: splat_idx_nxv8i8_nxv4i8_constant_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetvli a0, zero, e8, mf2, ta, ma
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; CHECK-NEXT: vmv.x.s a0, v8
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; CHECK-NEXT: vmv.v.x v8, a0
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 8 x i8> %v, i64 0
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%ins = insertelement <vscale x 4 x i8> poison, i8 %x, i32 0
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%splat = shufflevector <vscale x 4 x i8> %ins, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x i8> %splat
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}
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define <vscale x 4 x i8> @splat_idx_nxv8i8_nxv4i8_constant_3(<vscale x 8 x i8> %v) {
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; CHECK-LABEL: splat_idx_nxv8i8_nxv4i8_constant_3:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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; CHECK-NEXT: vslidedown.vi v8, v8, 3
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; CHECK-NEXT: vmv.x.s a0, v8
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; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a0
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 8 x i8> %v, i64 3
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%ins = insertelement <vscale x 4 x i8> poison, i8 %x, i32 0
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%splat = shufflevector <vscale x 4 x i8> %ins, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x i8> %splat
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}
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; Negative test, vscale coule be 2
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define <vscale x 4 x i8> @splat_idx_nxv8i8_nxv4i8_constant_15(<vscale x 8 x i8> %v) {
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; CHECK-LABEL: splat_idx_nxv8i8_nxv4i8_constant_15:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 1, e8, m1, ta, ma
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; CHECK-NEXT: vslidedown.vi v8, v8, 15
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; CHECK-NEXT: vmv.x.s a0, v8
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; CHECK-NEXT: vsetvli a1, zero, e8, mf2, ta, ma
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; CHECK-NEXT: vmv.v.x v8, a0
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 8 x i8> %v, i64 15
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%ins = insertelement <vscale x 4 x i8> poison, i8 %x, i32 0
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%splat = shufflevector <vscale x 4 x i8> %ins, <vscale x 4 x i8> poison, <vscale x 4 x i32> zeroinitializer
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ret <vscale x 4 x i8> %splat
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}
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define <8 x float> @splat_idx_nxv4f32_v8f32_constant_0(<vscale x 4 x float> %v) {
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; CHECK-LABEL: splat_idx_nxv4f32_v8f32_constant_0:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vfmv.f.s fa5, v8
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; CHECK-NEXT: vfmv.v.f v8, fa5
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 4 x float> %v, i64 0
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%ins = insertelement <8 x float> poison, float %x, i32 0
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%splat = shufflevector <8 x float> %ins, <8 x float> poison, <8 x i32> zeroinitializer
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ret <8 x float> %splat
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}
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define <8 x float> @splat_idx_nxv4f32_v8f32_constant_7(<vscale x 4 x float> %v) {
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; CHECK-LABEL: splat_idx_nxv4f32_v8f32_constant_7:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, ma
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; CHECK-NEXT: vslidedown.vi v8, v8, 7
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; CHECK-NEXT: vfmv.f.s fa5, v8
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa5
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 4 x float> %v, i64 7
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%ins = insertelement <8 x float> poison, float %x, i32 0
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%splat = shufflevector <8 x float> %ins, <8 x float> poison, <8 x i32> zeroinitializer
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ret <8 x float> %splat
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}
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; Negative test, vscale might be 4
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define <8 x float> @splat_idx_nxv4f32_v8f32_constant_8(<vscale x 4 x float> %v) {
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; CHECK-LABEL: splat_idx_nxv4f32_v8f32_constant_8:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vsetivli zero, 1, e32, m2, ta, ma
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; CHECK-NEXT: vslidedown.vi v8, v8, 8
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; CHECK-NEXT: vfmv.f.s fa5, v8
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; CHECK-NEXT: vsetivli zero, 8, e32, m2, ta, ma
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; CHECK-NEXT: vfmv.v.f v8, fa5
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; CHECK-NEXT: ret
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%x = extractelement <vscale x 4 x float> %v, i64 8
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%ins = insertelement <8 x float> poison, float %x, i32 0
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%splat = shufflevector <8 x float> %ins, <8 x float> poison, <8 x i32> zeroinitializer
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ret <8 x float> %splat
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}

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