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1 | 1 | // RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu i686 -tune-cpu i686 -emit-llvm %s -o - | FileCheck %s |
2 | 2 |
|
3 | | -int baz(int a) { return 4; } |
| 3 | +// CHECK: define {{.*}}@f_default({{.*}} [[f_default:#[0-9]+]] |
| 4 | +// CHECK: define {{.*}}@f_avx_sse4_2_ivybridge({{.*}} [[f_avx_sse4_2_ivybridge:#[0-9]+]] |
| 5 | +// CHECK: define {{.*}}@f_fpmath_387({{.*}} [[f_default]] |
| 6 | +// CHECK: define {{.*}}@f_no_sse2({{.*}} [[f_no_sse2:#[0-9]+]] |
| 7 | +// CHECK: define {{.*}}@f_sse4({{.*}} [[f_sse4:#[0-9]+]] |
| 8 | +// CHECK: define {{.*}}@f_no_sse4({{.*}} [[f_no_sse4:#[0-9]+]] |
| 9 | +// CHECK: define {{.*}}@f_default2({{.*}} [[f_default]] |
| 10 | +// CHECK: define {{.*}}@f_avx_sse4_2_ivybridge_2({{.*}} [[f_avx_sse4_2_ivybridge]] |
| 11 | +// CHECK: define {{.*}}@f_no_aes_ivybridge({{.*}} [[f_no_aes_ivybridge:#[0-9]+]] |
| 12 | +// CHECK: define {{.*}}@f_no_mmx({{.*}} [[f_no_mmx:#[0-9]+]] |
| 13 | +// CHECK: define {{.*}}@f_lakemont_mmx({{.*}} [[f_lakemont_mmx:#[0-9]+]] |
| 14 | +// CHECK: define {{.*}}@f_use_before_def({{.*}} [[f_lakemont_mmx]] |
| 15 | +// CHECK: define {{.*}}@f_tune_sandybridge({{.*}} [[f_tune_sandybridge:#[0-9]+]] |
| 16 | +// CHECK: define {{.*}}@f_x86_64_v2({{.*}} [[f_x86_64_v2:#[0-9]+]] |
| 17 | +// CHECK: define {{.*}}@f_x86_64_v3({{.*}} [[f_x86_64_v3:#[0-9]+]] |
| 18 | +// CHECK: define {{.*}}@f_x86_64_v4({{.*}} [[f_x86_64_v4:#[0-9]+]] |
| 19 | +// CHECK: define {{.*}}@f_avx10_1_256{{.*}} [[f_avx10_1_256:#[0-9]+]] |
| 20 | +// CHECK: define {{.*}}@f_avx10_1_512{{.*}} [[f_avx10_1_512:#[0-9]+]] |
| 21 | + |
| 22 | +// CHECK: [[f_default]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="i686" |
| 23 | +void f_default(void) {} |
| 24 | + |
| 25 | +// CHECK: [[f_avx_sse4_2_ivybridge]] = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" |
| 26 | +__attribute__((target("avx,sse4.2,arch=ivybridge"))) |
| 27 | +void f_avx_sse4_2_ivybridge(void) {} |
| 28 | + |
| 29 | +// We're currently ignoring the fpmath attribute. So checked above that |
| 30 | +// attributes are identical to f_default. |
| 31 | +__attribute__((target("fpmath=387"))) |
| 32 | +void f_fpmath_387(void) {} |
4 | 33 |
|
5 | | -int __attribute__((target("avx,sse4.2,arch=ivybridge"))) foo(int a) { return 4; } |
6 | | - |
7 | | -int __attribute__((target("fpmath=387"))) koala(int a) { return 4; } |
8 | | - |
9 | | -int __attribute__((target("no-sse2"))) echidna(int a) { return 4; } |
10 | | - |
11 | | -int __attribute__((target("sse4"))) panda(int a) { return 4; } |
12 | | -int __attribute__((target("no-sse4"))) narwhal(int a) { return 4; } |
| 34 | +// CHECK-NOT: tune-cpu |
| 35 | +// CHECK: [[f_no_sse2]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sm4,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686" |
| 36 | +__attribute__((target("no-sse2"))) |
| 37 | +void f_no_sse2(void) {} |
| 38 | + |
| 39 | +// CHECK: [[f_sse4]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686" |
| 40 | +__attribute__((target("sse4"))) |
| 41 | +void f_sse4(void) {} |
| 42 | + |
| 43 | +// CHECK: [[f_no_sse4]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sm4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686" |
| 44 | +__attribute__((target("no-sse4"))) |
| 45 | +void f_no_sse4(void) {} |
| 46 | + |
| 47 | +// checked above that attributes are identical to f_default |
| 48 | +void f_default2(void) { |
| 49 | + f_avx_sse4_2_ivybridge(); |
| 50 | + return f_default(); |
| 51 | +} |
13 | 52 |
|
14 | | -int bar(int a) { return baz(a) + foo(a); } |
| 53 | +// Checked above to have same attributes as f_avx_sse4_2_ivybridge |
| 54 | +__attribute__((target("avx, sse4.2, arch= ivybridge"))) |
| 55 | +void f_avx_sse4_2_ivybridge_2(void) {} |
15 | 56 |
|
16 | | -int __attribute__((target("avx, sse4.2, arch= ivybridge"))) qux(int a) { return 4; } |
17 | | -int __attribute__((target("no-aes, arch=ivybridge"))) qax(int a) { return 4; } |
| 57 | +// CHECK: [[f_no_aes_ivybridge]] = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-amx-avx512,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-vaes" |
| 58 | +__attribute__((target("no-aes, arch=ivybridge"))) |
| 59 | +void f_no_aes_ivybridge(void) {} |
18 | 60 |
|
19 | | -int __attribute__((target("no-mmx"))) qq(int a) { return 40; } |
| 61 | +// CHECK-NOT: tune-cpu |
| 62 | +// CHECK: [[f_no_mmx]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-mmx" |
| 63 | +__attribute__((target("no-mmx"))) |
| 64 | +void f_no_mmx(void) {} |
20 | 65 |
|
21 | | -int __attribute__((target("arch=lakemont,mmx"))) lake(int a) { return 4; } |
| 66 | +// CHECK: [[f_lakemont_mmx]] = {{.*}}"target-cpu"="lakemont" "target-features"="+cx8,+mmx" |
| 67 | +// Adding the attribute to a definition does update it in IR. |
| 68 | +__attribute__((target("arch=lakemont,mmx"))) |
| 69 | +void f_lakemont_mmx(void) {} |
22 | 70 |
|
23 | | -int use_before_def(void); |
24 | | -int useage(void){ |
25 | | - return use_before_def(); |
| 71 | +void f_use_before_def(void); |
| 72 | +void usage(void){ |
| 73 | + f_use_before_def(); |
26 | 74 | } |
27 | 75 |
|
28 | | -// Adding the attribute to a definition does update it in IR. |
29 | | -int __attribute__((target("arch=lakemont,mmx"))) use_before_def(void) { |
30 | | - return 5; |
31 | | -} |
| 76 | +// Checked above to have same attributes as f_lakemont_mmx |
| 77 | +__attribute__((target("arch=lakemont,mmx"))) |
| 78 | +void f_use_before_def(void) {} |
32 | 79 |
|
33 | | -int __attribute__((target("tune=sandybridge"))) walrus(int a) { return 4; } |
34 | | - |
35 | | -void __attribute__((target("arch=x86-64-v2"))) x86_64_v2(void) {} |
36 | | -void __attribute__((target("arch=x86-64-v3"))) x86_64_v3(void) {} |
37 | | -void __attribute__((target("arch=x86-64-v4"))) x86_64_v4(void) {} |
38 | | - |
39 | | -void __attribute__((target("avx10.1-256"))) avx10_1_256(void) {} |
40 | | -void __attribute__((target("avx10.1-512"))) avx10_1_512(void) {} |
41 | | - |
42 | | -// Check that we emit the additional subtarget and cpu features for foo and not for baz or bar. |
43 | | -// CHECK: baz{{.*}} #0 |
44 | | -// CHECK: foo{{.*}} #1 |
45 | | -// We're currently ignoring the fpmath attribute so koala should be identical to baz and bar. |
46 | | -// CHECK: koala{{.*}} #0 |
47 | | -// CHECK: echidna{{.*}} #2 |
48 | | -// CHECK: panda{{.*}} #3 |
49 | | -// CHECK: narwhal{{.*}} #4 |
50 | | -// CHECK: bar{{.*}} #0 |
51 | | -// CHECK: qux{{.*}} #1 |
52 | | -// CHECK: qax{{.*}} #5 |
53 | | -// CHECK: qq{{.*}} #6 |
54 | | -// CHECK: lake{{.*}} #7 |
55 | | -// CHECK: use_before_def{{.*}} #7 |
56 | | -// CHECK: walrus{{.*}} #8 |
57 | | -// CHECK: avx10_1_256{{.*}} #12 |
58 | | -// CHECK: avx10_1_512{{.*}} #13 |
59 | | -// CHECK: #0 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="i686" |
60 | | -// CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt" |
61 | | -// CHECK-NOT: tune-cpu |
62 | | -// CHECK: #2 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-aes,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-gfni,-kl,-pclmul,-sha,-sha512,-sm3,-sm4,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-vaes,-vpclmulqdq,-widekl,-xop" "tune-cpu"="i686" |
63 | | -// CHECK: #3 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+crc32,+cx8,+mmx,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" "tune-cpu"="i686" |
64 | | -// CHECK: #4 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-amx-avx512,-avx,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-avx2,-avx512bf16,-avx512bitalg,-avx512bw,-avx512cd,-avx512dq,-avx512f,-avx512fp16,-avx512ifma,-avx512vbmi,-avx512vbmi2,-avx512vl,-avx512vnni,-avx512vp2intersect,-avx512vpopcntdq,-avxifma,-avxneconvert,-avxvnni,-avxvnniint16,-avxvnniint8,-f16c,-fma,-fma4,-sha512,-sm3,-sm4,-sse4.1,-sse4.2,-vaes,-vpclmulqdq,-xop" "tune-cpu"="i686" |
65 | | -// CHECK: #5 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+cmov,+crc32,+cx16,+cx8,+f16c,+fsgsbase,+fxsr,+mmx,+pclmul,+popcnt,+rdrnd,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave,+xsaveopt,-aes,-amx-avx512,-avx10.1-256,-avx10.1-512,-avx10.2-256,-avx10.2-512,-vaes" |
66 | | -// CHECK-NOT: tune-cpu |
67 | | -// CHECK: #6 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87,-mmx" |
68 | | -// CHECK: #7 = {{.*}}"target-cpu"="lakemont" "target-features"="+cx8,+mmx" |
69 | | -// CHECK-NOT: tune-cpu |
70 | | -// CHECK: #8 = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="sandybridge" |
| 80 | +// CHECK: [[f_tune_sandybridge]] = {{.*}}"target-cpu"="i686" "target-features"="+cmov,+cx8,+x87" "tune-cpu"="sandybridge" |
| 81 | +__attribute__((target("tune=sandybridge"))) |
| 82 | +void f_tune_sandybridge(void) {} |
71 | 83 |
|
72 | | -// CHECK: "target-cpu"="x86-64-v2" |
| 84 | +// CHECK: [[f_x86_64_v2]] ={{.*}}"target-cpu"="x86-64-v2" |
73 | 85 | // CHECK-SAME: "target-features"="+cmov,+crc32,+cx16,+cx8,+fxsr,+mmx,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87" |
74 | | -// CHECK: "target-cpu"="x86-64-v3" |
| 86 | +__attribute__((target("arch=x86-64-v2"))) |
| 87 | +void f_x86_64_v2(void) {} |
| 88 | + |
| 89 | +// CHECK: [[f_x86_64_v3]] = {{.*}}"target-cpu"="x86-64-v3" |
75 | 90 | // CHECK-SAME: "target-features"="+avx,+avx2,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" |
76 | | -// CHECK: "target-cpu"="x86-64-v4" |
| 91 | +__attribute__((target("arch=x86-64-v3"))) |
| 92 | +void f_x86_64_v3(void) {} |
| 93 | + |
| 94 | +// CHECK: [[f_x86_64_v4]] = {{.*}}"target-cpu"="x86-64-v4" |
77 | 95 | // CHECK-SAME: "target-features"="+avx,+avx2,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512vl,+bmi,+bmi2,+cmov,+crc32,+cx16,+cx8,+evex512,+f16c,+fma,+fxsr,+lzcnt,+mmx,+movbe,+popcnt,+sahf,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+x87,+xsave" |
| 96 | +__attribute__((target("arch=x86-64-v4"))) |
| 97 | +void f_x86_64_v4(void) {} |
| 98 | + |
| 99 | +// CHECK: [[f_avx10_1_256]] = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave,-amx-avx512,-avx10.1-512,-avx10.2-512,-evex512" |
| 100 | +__attribute__((target("avx10.1-256"))) |
| 101 | +void f_avx10_1_256(void) {} |
78 | 102 |
|
79 | | -// CHECK: #12 = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave,-amx-avx512,-avx10.1-512,-avx10.2-512,-evex512" |
80 | | -// CHECK: #13 = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx10.1-512,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+evex512,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave" |
| 103 | +// CHECK: [[f_avx10_1_512]] = {{.*}}"target-cpu"="i686" "target-features"="+aes,+avx,+avx10.1-256,+avx10.1-512,+avx2,+avx512bf16,+avx512bitalg,+avx512bw,+avx512cd,+avx512dq,+avx512f,+avx512fp16,+avx512ifma,+avx512vbmi,+avx512vbmi2,+avx512vl,+avx512vnni,+avx512vpopcntdq,+cmov,+crc32,+cx8,+evex512,+f16c,+fma,+mmx,+pclmul,+popcnt,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3,+vaes,+vpclmulqdq,+x87,+xsave" |
| 104 | +__attribute__((target("avx10.1-512"))) |
| 105 | +void f_avx10_1_512(void) {} |
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