[CodeGen] Use early return to simplify SplitEditor::defFromParent [NFC]

Author: preames

llvm/lib/CodeGen/SplitKit.cpp

@@ -625,7 +625,6 @@ bool SplitEditor::rematWillIncreaseRestriction(const MachineInstr *DefMI,
 VNInfo *SplitEditor::defFromParent(unsigned RegIdx, const VNInfo *ParentVNI,
                                    SlotIndex UseIdx, MachineBasicBlock &MBB,
                                    MachineBasicBlock::iterator I) {
-  SlotIndex Def;
   LiveInterval *LI = &LIS.getInterval(Edit->get(RegIdx));
 
   // We may be trying to avoid interference that ends at a deleted instruction,
@@ -638,44 +637,43 @@ VNInfo *SplitEditor::defFromParent(unsigned RegIdx, const VNInfo *ParentVNI,
   VNInfo *OrigVNI = OrigLI.getVNInfoAt(UseIdx);
 
   Register Reg = LI->reg();
-  bool DidRemat = false;
   if (OrigVNI) {
     LiveRangeEdit::Remat RM(ParentVNI);
     RM.OrigMI = LIS.getInstructionFromIndex(OrigVNI->def);
     if (Edit->canRematerializeAt(RM, OrigVNI, UseIdx, true)) {
       if (!rematWillIncreaseRestriction(RM.OrigMI, MBB, UseIdx)) {
-        Def = Edit->rematerializeAt(MBB, I, Reg, RM, TRI, Late);
+        SlotIndex Def = Edit->rematerializeAt(MBB, I, Reg, RM, TRI, Late);
         ++NumRemats;
-        DidRemat = true;
-      } else {
-        LLVM_DEBUG(
-            dbgs() << "skipping rematerialize of " << printReg(Reg) << " at "
-                   << UseIdx
-                   << " since it will increase register class restrictions\n");
+        // Define the value in Reg.
+        return defValue(RegIdx, ParentVNI, Def, false);
       }
+      LLVM_DEBUG(
+          dbgs() << "skipping rematerialize of " << printReg(Reg) << " at "
+                 << UseIdx
+                 << " since it will increase register class restrictions\n");
     }
   }
-  if (!DidRemat) {
-    LaneBitmask LaneMask;
-    if (OrigLI.hasSubRanges()) {
-      LaneMask = LaneBitmask::getNone();
-      for (LiveInterval::SubRange &S : OrigLI.subranges()) {
-        if (S.liveAt(UseIdx))
-          LaneMask |= S.LaneMask;
-      }
-    } else {
-      LaneMask = LaneBitmask::getAll();
-    }
 
-    if (LaneMask.none()) {
-      const MCInstrDesc &Desc = TII.get(TargetOpcode::IMPLICIT_DEF);
-      MachineInstr *ImplicitDef = BuildMI(MBB, I, DebugLoc(), Desc, Reg);
-      SlotIndexes &Indexes = *LIS.getSlotIndexes();
-      Def = Indexes.insertMachineInstrInMaps(*ImplicitDef, Late).getRegSlot();
-    } else {
-      ++NumCopies;
-      Def = buildCopy(Edit->getReg(), Reg, LaneMask, MBB, I, Late, RegIdx);
+  LaneBitmask LaneMask;
+  if (OrigLI.hasSubRanges()) {
+    LaneMask = LaneBitmask::getNone();
+    for (LiveInterval::SubRange &S : OrigLI.subranges()) {
+      if (S.liveAt(UseIdx))
+        LaneMask |= S.LaneMask;
     }
+  } else {
+    LaneMask = LaneBitmask::getAll();
+  }
+
+  SlotIndex Def;
+  if (LaneMask.none()) {
+    const MCInstrDesc &Desc = TII.get(TargetOpcode::IMPLICIT_DEF);
+    MachineInstr *ImplicitDef = BuildMI(MBB, I, DebugLoc(), Desc, Reg);
+    SlotIndexes &Indexes = *LIS.getSlotIndexes();
+    Def = Indexes.insertMachineInstrInMaps(*ImplicitDef, Late).getRegSlot();
+  } else {
+    ++NumCopies;
+    Def = buildCopy(Edit->getReg(), Reg, LaneMask, MBB, I, Late, RegIdx);
   }
 
   // Define the value in Reg.