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[DAG]: Updated tests
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‎llvm/test/CodeGen/AArch64/neon-compare-instructions.ll‎

Lines changed: 180 additions & 84 deletions
Original file line numberDiff line numberDiff line change
@@ -2217,83 +2217,131 @@ define <2 x i64> @fcmord2xdouble(<2 x double> %A, <2 x double> %B) {
22172217

22182218
; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.
22192219
define <2 x i32> @fcmuno2xfloat(<2 x float> %A, <2 x float> %B) {
2220-
; CHECK-LABEL: fcmuno2xfloat:
2221-
; CHECK: // %bb.0:
2222-
; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s
2223-
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2224-
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
2225-
; CHECK-NEXT: mvn v0.8b, v0.8b
2226-
; CHECK-NEXT: ret
2220+
; CHECK-SD-LABEL: fcmuno2xfloat:
2221+
; CHECK-SD: // %bb.0:
2222+
; CHECK-SD-NEXT: fcmgt v2.2s, v1.2s, v0.2s
2223+
; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, v1.2s
2224+
; CHECK-SD-NEXT: mvn v1.8b, v2.8b
2225+
; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b
2226+
; CHECK-SD-NEXT: ret
2227+
;
2228+
; CHECK-GI-LABEL: fcmuno2xfloat:
2229+
; CHECK-GI: // %bb.0:
2230+
; CHECK-GI-NEXT: fcmge v2.2s, v0.2s, v1.2s
2231+
; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2232+
; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
2233+
; CHECK-GI-NEXT: mvn v0.8b, v0.8b
2234+
; CHECK-GI-NEXT: ret
22272235
%tmp3 = fcmp uno <2 x float> %A, %B
22282236
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
22292237
ret <2 x i32> %tmp4
22302238
}
22312239

22322240
; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.
22332241
define <4 x i32> @fcmuno4xfloat(<4 x float> %A, <4 x float> %B) {
2234-
; CHECK-LABEL: fcmuno4xfloat:
2235-
; CHECK: // %bb.0:
2236-
; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s
2237-
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2238-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2239-
; CHECK-NEXT: mvn v0.16b, v0.16b
2240-
; CHECK-NEXT: ret
2242+
; CHECK-SD-LABEL: fcmuno4xfloat:
2243+
; CHECK-SD: // %bb.0:
2244+
; CHECK-SD-NEXT: fcmgt v2.4s, v1.4s, v0.4s
2245+
; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, v1.4s
2246+
; CHECK-SD-NEXT: mvn v1.16b, v2.16b
2247+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
2248+
; CHECK-SD-NEXT: ret
2249+
;
2250+
; CHECK-GI-LABEL: fcmuno4xfloat:
2251+
; CHECK-GI: // %bb.0:
2252+
; CHECK-GI-NEXT: fcmge v2.4s, v0.4s, v1.4s
2253+
; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2254+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
2255+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
2256+
; CHECK-GI-NEXT: ret
22412257
%tmp3 = fcmp uno <4 x float> %A, %B
22422258
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
22432259
ret <4 x i32> %tmp4
22442260
}
22452261

22462262
; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.
22472263
define <2 x i64> @fcmuno2xdouble(<2 x double> %A, <2 x double> %B) {
2248-
; CHECK-LABEL: fcmuno2xdouble:
2249-
; CHECK: // %bb.0:
2250-
; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d
2251-
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2252-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2253-
; CHECK-NEXT: mvn v0.16b, v0.16b
2254-
; CHECK-NEXT: ret
2264+
; CHECK-SD-LABEL: fcmuno2xdouble:
2265+
; CHECK-SD: // %bb.0:
2266+
; CHECK-SD-NEXT: fcmgt v2.2d, v1.2d, v0.2d
2267+
; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, v1.2d
2268+
; CHECK-SD-NEXT: mvn v1.16b, v2.16b
2269+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
2270+
; CHECK-SD-NEXT: ret
2271+
;
2272+
; CHECK-GI-LABEL: fcmuno2xdouble:
2273+
; CHECK-GI: // %bb.0:
2274+
; CHECK-GI-NEXT: fcmge v2.2d, v0.2d, v1.2d
2275+
; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2276+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
2277+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
2278+
; CHECK-GI-NEXT: ret
22552279
%tmp3 = fcmp uno <2 x double> %A, %B
22562280
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
22572281
ret <2 x i64> %tmp4
22582282
}
22592283

22602284
; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands
22612285
define <2 x i32> @fcmueq2xfloat(<2 x float> %A, <2 x float> %B) {
2262-
; CHECK-LABEL: fcmueq2xfloat:
2263-
; CHECK: // %bb.0:
2264-
; CHECK-NEXT: fcmgt v2.2s, v0.2s, v1.2s
2265-
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2266-
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
2267-
; CHECK-NEXT: mvn v0.8b, v0.8b
2268-
; CHECK-NEXT: ret
2286+
; CHECK-SD-LABEL: fcmueq2xfloat:
2287+
; CHECK-SD: // %bb.0:
2288+
; CHECK-SD-NEXT: fcmgt v2.2s, v1.2s, v0.2s
2289+
; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, v1.2s
2290+
; CHECK-SD-NEXT: mvn v1.8b, v2.8b
2291+
; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b
2292+
; CHECK-SD-NEXT: ret
2293+
;
2294+
; CHECK-GI-LABEL: fcmueq2xfloat:
2295+
; CHECK-GI: // %bb.0:
2296+
; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s
2297+
; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2298+
; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
2299+
; CHECK-GI-NEXT: mvn v0.8b, v0.8b
2300+
; CHECK-GI-NEXT: ret
22692301
%tmp3 = fcmp ueq <2 x float> %A, %B
22702302
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
22712303
ret <2 x i32> %tmp4
22722304
}
22732305

22742306
; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands
22752307
define <4 x i32> @fcmueq4xfloat(<4 x float> %A, <4 x float> %B) {
2276-
; CHECK-LABEL: fcmueq4xfloat:
2277-
; CHECK: // %bb.0:
2278-
; CHECK-NEXT: fcmgt v2.4s, v0.4s, v1.4s
2279-
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2280-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2281-
; CHECK-NEXT: mvn v0.16b, v0.16b
2282-
; CHECK-NEXT: ret
2308+
; CHECK-SD-LABEL: fcmueq4xfloat:
2309+
; CHECK-SD: // %bb.0:
2310+
; CHECK-SD-NEXT: fcmgt v2.4s, v1.4s, v0.4s
2311+
; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, v1.4s
2312+
; CHECK-SD-NEXT: mvn v1.16b, v2.16b
2313+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
2314+
; CHECK-SD-NEXT: ret
2315+
;
2316+
; CHECK-GI-LABEL: fcmueq4xfloat:
2317+
; CHECK-GI: // %bb.0:
2318+
; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s
2319+
; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2320+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
2321+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
2322+
; CHECK-GI-NEXT: ret
22832323
%tmp3 = fcmp ueq <4 x float> %A, %B
22842324
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
22852325
ret <4 x i32> %tmp4
22862326
}
22872327

22882328
; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands
22892329
define <2 x i64> @fcmueq2xdouble(<2 x double> %A, <2 x double> %B) {
2290-
; CHECK-LABEL: fcmueq2xdouble:
2291-
; CHECK: // %bb.0:
2292-
; CHECK-NEXT: fcmgt v2.2d, v0.2d, v1.2d
2293-
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2294-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2295-
; CHECK-NEXT: mvn v0.16b, v0.16b
2296-
; CHECK-NEXT: ret
2330+
; CHECK-SD-LABEL: fcmueq2xdouble:
2331+
; CHECK-SD: // %bb.0:
2332+
; CHECK-SD-NEXT: fcmgt v2.2d, v1.2d, v0.2d
2333+
; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, v1.2d
2334+
; CHECK-SD-NEXT: mvn v1.16b, v2.16b
2335+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
2336+
; CHECK-SD-NEXT: ret
2337+
;
2338+
; CHECK-GI-LABEL: fcmueq2xdouble:
2339+
; CHECK-GI: // %bb.0:
2340+
; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d
2341+
; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2342+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
2343+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
2344+
; CHECK-GI-NEXT: ret
22972345
%tmp3 = fcmp ueq <2 x double> %A, %B
22982346
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
22992347
ret <2 x i64> %tmp4
@@ -2792,41 +2840,65 @@ define <2 x i64> @fcmordz2xdouble(<2 x double> %A) {
27922840

27932841
; UEQ with zero = !ONE = !(OLT |OGT)
27942842
define <2 x i32> @fcmueqz2xfloat(<2 x float> %A) {
2795-
; CHECK-LABEL: fcmueqz2xfloat:
2796-
; CHECK: // %bb.0:
2797-
; CHECK-NEXT: fcmgt v1.2s, v0.2s, #0.0
2798-
; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
2799-
; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
2800-
; CHECK-NEXT: mvn v0.8b, v0.8b
2801-
; CHECK-NEXT: ret
2843+
; CHECK-SD-LABEL: fcmueqz2xfloat:
2844+
; CHECK-SD: // %bb.0:
2845+
; CHECK-SD-NEXT: fcmlt v1.2s, v0.2s, #0.0
2846+
; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, #0.0
2847+
; CHECK-SD-NEXT: mvn v1.8b, v1.8b
2848+
; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b
2849+
; CHECK-SD-NEXT: ret
2850+
;
2851+
; CHECK-GI-LABEL: fcmueqz2xfloat:
2852+
; CHECK-GI: // %bb.0:
2853+
; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.0
2854+
; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
2855+
; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b
2856+
; CHECK-GI-NEXT: mvn v0.8b, v0.8b
2857+
; CHECK-GI-NEXT: ret
28022858
%tmp3 = fcmp ueq <2 x float> %A, zeroinitializer
28032859
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
28042860
ret <2 x i32> %tmp4
28052861
}
28062862

28072863
; UEQ with zero = !ONE = !(OLT |OGT)
28082864
define <4 x i32> @fcmueqz4xfloat(<4 x float> %A) {
2809-
; CHECK-LABEL: fcmueqz4xfloat:
2810-
; CHECK: // %bb.0:
2811-
; CHECK-NEXT: fcmgt v1.4s, v0.4s, #0.0
2812-
; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
2813-
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
2814-
; CHECK-NEXT: mvn v0.16b, v0.16b
2815-
; CHECK-NEXT: ret
2865+
; CHECK-SD-LABEL: fcmueqz4xfloat:
2866+
; CHECK-SD: // %bb.0:
2867+
; CHECK-SD-NEXT: fcmlt v1.4s, v0.4s, #0.0
2868+
; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, #0.0
2869+
; CHECK-SD-NEXT: mvn v1.16b, v1.16b
2870+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
2871+
; CHECK-SD-NEXT: ret
2872+
;
2873+
; CHECK-GI-LABEL: fcmueqz4xfloat:
2874+
; CHECK-GI: // %bb.0:
2875+
; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.0
2876+
; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
2877+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
2878+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
2879+
; CHECK-GI-NEXT: ret
28162880
%tmp3 = fcmp ueq <4 x float> %A, zeroinitializer
28172881
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
28182882
ret <4 x i32> %tmp4
28192883
}
28202884

28212885
; UEQ with zero = !ONE = !(OLT |OGT)
28222886
define <2 x i64> @fcmueqz2xdouble(<2 x double> %A) {
2823-
; CHECK-LABEL: fcmueqz2xdouble:
2824-
; CHECK: // %bb.0:
2825-
; CHECK-NEXT: fcmgt v1.2d, v0.2d, #0.0
2826-
; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
2827-
; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
2828-
; CHECK-NEXT: mvn v0.16b, v0.16b
2829-
; CHECK-NEXT: ret
2887+
; CHECK-SD-LABEL: fcmueqz2xdouble:
2888+
; CHECK-SD: // %bb.0:
2889+
; CHECK-SD-NEXT: fcmlt v1.2d, v0.2d, #0.0
2890+
; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, #0.0
2891+
; CHECK-SD-NEXT: mvn v1.16b, v1.16b
2892+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
2893+
; CHECK-SD-NEXT: ret
2894+
;
2895+
; CHECK-GI-LABEL: fcmueqz2xdouble:
2896+
; CHECK-GI: // %bb.0:
2897+
; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.0
2898+
; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
2899+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
2900+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
2901+
; CHECK-GI-NEXT: ret
28302902
%tmp3 = fcmp ueq <2 x double> %A, zeroinitializer
28312903
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
28322904
ret <2 x i64> %tmp4
@@ -3286,39 +3358,63 @@ define <2 x i64> @fcmord2xdouble_fast(<2 x double> %A, <2 x double> %B) {
32863358

32873359

32883360
define <2 x i32> @fcmuno2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3289-
; CHECK-LABEL: fcmuno2xfloat_fast:
3290-
; CHECK: // %bb.0:
3291-
; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s
3292-
; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3293-
; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
3294-
; CHECK-NEXT: mvn v0.8b, v0.8b
3295-
; CHECK-NEXT: ret
3361+
; CHECK-SD-LABEL: fcmuno2xfloat_fast:
3362+
; CHECK-SD: // %bb.0:
3363+
; CHECK-SD-NEXT: fcmgt v2.2s, v1.2s, v0.2s
3364+
; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, v1.2s
3365+
; CHECK-SD-NEXT: mvn v1.8b, v2.8b
3366+
; CHECK-SD-NEXT: bic v0.8b, v1.8b, v0.8b
3367+
; CHECK-SD-NEXT: ret
3368+
;
3369+
; CHECK-GI-LABEL: fcmuno2xfloat_fast:
3370+
; CHECK-GI: // %bb.0:
3371+
; CHECK-GI-NEXT: fcmge v2.2s, v0.2s, v1.2s
3372+
; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3373+
; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
3374+
; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3375+
; CHECK-GI-NEXT: ret
32963376
%tmp3 = fcmp fast uno <2 x float> %A, %B
32973377
%tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
32983378
ret <2 x i32> %tmp4
32993379
}
33003380

33013381
define <4 x i32> @fcmuno4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3302-
; CHECK-LABEL: fcmuno4xfloat_fast:
3303-
; CHECK: // %bb.0:
3304-
; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s
3305-
; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3306-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
3307-
; CHECK-NEXT: mvn v0.16b, v0.16b
3308-
; CHECK-NEXT: ret
3382+
; CHECK-SD-LABEL: fcmuno4xfloat_fast:
3383+
; CHECK-SD: // %bb.0:
3384+
; CHECK-SD-NEXT: fcmgt v2.4s, v1.4s, v0.4s
3385+
; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, v1.4s
3386+
; CHECK-SD-NEXT: mvn v1.16b, v2.16b
3387+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
3388+
; CHECK-SD-NEXT: ret
3389+
;
3390+
; CHECK-GI-LABEL: fcmuno4xfloat_fast:
3391+
; CHECK-GI: // %bb.0:
3392+
; CHECK-GI-NEXT: fcmge v2.4s, v0.4s, v1.4s
3393+
; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3394+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
3395+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3396+
; CHECK-GI-NEXT: ret
33093397
%tmp3 = fcmp fast uno <4 x float> %A, %B
33103398
%tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
33113399
ret <4 x i32> %tmp4
33123400
}
33133401

33143402
define <2 x i64> @fcmuno2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3315-
; CHECK-LABEL: fcmuno2xdouble_fast:
3316-
; CHECK: // %bb.0:
3317-
; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d
3318-
; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3319-
; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
3320-
; CHECK-NEXT: mvn v0.16b, v0.16b
3321-
; CHECK-NEXT: ret
3403+
; CHECK-SD-LABEL: fcmuno2xdouble_fast:
3404+
; CHECK-SD: // %bb.0:
3405+
; CHECK-SD-NEXT: fcmgt v2.2d, v1.2d, v0.2d
3406+
; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, v1.2d
3407+
; CHECK-SD-NEXT: mvn v1.16b, v2.16b
3408+
; CHECK-SD-NEXT: bic v0.16b, v1.16b, v0.16b
3409+
; CHECK-SD-NEXT: ret
3410+
;
3411+
; CHECK-GI-LABEL: fcmuno2xdouble_fast:
3412+
; CHECK-GI: // %bb.0:
3413+
; CHECK-GI-NEXT: fcmge v2.2d, v0.2d, v1.2d
3414+
; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3415+
; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
3416+
; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3417+
; CHECK-GI-NEXT: ret
33223418
%tmp3 = fcmp fast uno <2 x double> %A, %B
33233419
%tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
33243420
ret <2 x i64> %tmp4

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