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davemgreendavemgreen
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[AArch64] Change the coercion type of structs with pointer members.
The aim here is to avoid a ptrtoint->inttoptr round-trip throught the function argument whilst keeping the calling convention the same. Given a struct which is <= 128bits in size, which can only contain either 1 or 2 pointers, we convert to a ptr or [2 x ptr] as opposed to the old coercion that uses i64 or [2 x i64].
1 parent ac11997 commit e3d22cc

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5 files changed

+64
-36
lines changed

5 files changed

+64
-36
lines changed

‎clang/lib/CodeGen/Targets/AArch64.cpp‎

Lines changed: 33 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -486,6 +486,39 @@ ABIArgInfo AArch64ABIInfo::classifyArgumentType(QualType Ty, bool IsVariadicFn,
486486
}
487487
Size = llvm::alignTo(Size, Alignment);
488488

489+
// If the Aggregate is made up of pointers, use an array of pointers for the
490+
// coerced type. This prevents having to convert ptr2int->int2ptr through
491+
// the call, allowing alias analysis to produce better code.
492+
std::function<bool(QualType Ty)> ContainsOnlyPointers = [&](QualType Ty) {
493+
if (isEmptyRecord(getContext(), Ty, true))
494+
return false;
495+
const RecordType *RT = Ty->getAs<RecordType>();
496+
if (!RT)
497+
return false;
498+
const RecordDecl *RD = RT->getDecl();
499+
if (const CXXRecordDecl *CXXRD = dyn_cast<CXXRecordDecl>(RD)) {
500+
for (const auto &I : CXXRD->bases())
501+
if (!ContainsOnlyPointers(I.getType()))
502+
return false;
503+
}
504+
return all_of(RD->fields(), [&](FieldDecl *FD) {
505+
QualType FDTy = FD->getType();
506+
if (FDTy->isArrayType())
507+
FDTy = getContext().getBaseElementType(FDTy);
508+
return (FDTy->isPointerOrReferenceType() &&
509+
getContext().getTypeSize(FDTy) == 64) ||
510+
ContainsOnlyPointers(FDTy);
511+
});
512+
};
513+
if (Alignment <= 64 && ContainsOnlyPointers(Ty)) {
514+
assert((Size == 64 || Size == 128) &&
515+
"Expected a 64 or 128bit struct containing pointers");
516+
llvm::Type *PtrTy = llvm::PointerType::getUnqual(getVMContext());
517+
if (Size == 128)
518+
PtrTy = llvm::ArrayType::get(PtrTy, 2);
519+
return ABIArgInfo::getDirect(PtrTy);
520+
}
521+
489522
// We use a pair of i64 for 16-byte aggregate with 8-byte alignment.
490523
// For aggregates with 16-byte alignment, we use i128.
491524
llvm::Type *BaseTy = llvm::Type::getIntNTy(getVMContext(), Alignment);

‎clang/test/CodeGen/AArch64/struct-coerce-using-ptr.cpp‎

Lines changed: 24 additions & 26 deletions
Original file line numberDiff line numberDiff line change
@@ -29,12 +29,11 @@ struct Sp {
2929
int *x;
3030
};
3131
// CHECK-A64-LABEL: define dso_local void @_Z2Tp2Sp(
32-
// CHECK-A64-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] {
32+
// CHECK-A64-SAME: ptr [[S_COERCE:%.*]]) #[[ATTR0]] {
3333
// CHECK-A64-NEXT: [[ENTRY:.*:]]
3434
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SP:%.*]], align 8
3535
// CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SP]], ptr [[S]], i32 0, i32 0
36-
// CHECK-A64-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i64 [[S_COERCE]] to ptr
37-
// CHECK-A64-NEXT: store ptr [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 8
36+
// CHECK-A64-NEXT: store ptr [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
3837
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SP]], ptr [[S]], i32 0, i32 0
3938
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
4039
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4
@@ -58,10 +57,10 @@ struct Spp {
5857
int *x, *y;
5958
};
6059
// CHECK-A64-LABEL: define dso_local void @_Z3Tpp3Spp(
61-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
60+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
6261
// CHECK-A64-NEXT: [[ENTRY:.*:]]
6362
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SPP:%.*]], align 8
64-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[S]], align 8
63+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[S]], align 8
6564
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP]], ptr [[S]], i32 0, i32 0
6665
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
6766
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4
@@ -135,10 +134,10 @@ struct Srp {
135134
int &x, *y;
136135
};
137136
// CHECK-A64-LABEL: define dso_local void @_Z3Trp3Srp(
138-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
137+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
139138
// CHECK-A64-NEXT: [[ENTRY:.*:]]
140139
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SRP:%.*]], align 8
141-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[S]], align 8
140+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[S]], align 8
142141
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SRP]], ptr [[S]], i32 0, i32 0
143142
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
144143
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4
@@ -160,10 +159,10 @@ struct __attribute__((__packed__)) Spp_packed {
160159
int *x, *y;
161160
};
162161
// CHECK-A64-LABEL: define dso_local void @_Z10Tpp_packed10Spp_packed(
163-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
162+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
164163
// CHECK-A64-NEXT: [[ENTRY:.*:]]
165164
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SPP_PACKED:%.*]], align 1
166-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[S]], align 1
165+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[S]], align 1
167166
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP_PACKED]], ptr [[S]], i32 0, i32 0
168167
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 1
169168
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4
@@ -185,11 +184,11 @@ struct __attribute__((__packed__)) Spp_superpacked {
185184
Spp_packed x;
186185
};
187186
// CHECK-A64-LABEL: define dso_local void @_Z15Tpp_superpacked15Spp_superpacked(
188-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
187+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
189188
// CHECK-A64-NEXT: [[ENTRY:.*:]]
190189
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SPP_SUPERPACKED:%.*]], align 1
191190
// CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP_SUPERPACKED]], ptr [[S]], i32 0, i32 0
192-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[COERCE_DIVE]], align 1
191+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[COERCE_DIVE]], align 1
193192
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP_SUPERPACKED]], ptr [[S]], i32 0, i32 0
194193
// CHECK-A64-NEXT: [[X1:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP_PACKED:%.*]], ptr [[X]], i32 0, i32 0
195194
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X1]], align 1
@@ -215,12 +214,11 @@ union Upp {
215214
long long *y;
216215
};
217216
// CHECK-A64-LABEL: define dso_local void @_Z11Tupp_packed3Upp(
218-
// CHECK-A64-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] {
217+
// CHECK-A64-SAME: ptr [[S_COERCE:%.*]]) #[[ATTR0]] {
219218
// CHECK-A64-NEXT: [[ENTRY:.*:]]
220219
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[UNION_UPP:%.*]], align 8
221220
// CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[UNION_UPP]], ptr [[S]], i32 0, i32 0
222-
// CHECK-A64-NEXT: [[COERCE_VAL_IP:%.*]] = inttoptr i64 [[S_COERCE]] to ptr
223-
// CHECK-A64-NEXT: store ptr [[COERCE_VAL_IP]], ptr [[COERCE_DIVE]], align 8
221+
// CHECK-A64-NEXT: store ptr [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
224222
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S]], align 8
225223
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4
226224
// CHECK-A64-NEXT: ret void
@@ -326,10 +324,10 @@ struct SSpSp {
326324
struct Sp a, b;
327325
};
328326
// CHECK-A64-LABEL: define dso_local void @_Z5TSpSp5SSpSp(
329-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
327+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
330328
// CHECK-A64-NEXT: [[ENTRY:.*:]]
331329
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SSPSP:%.*]], align 8
332-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[S]], align 8
330+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[S]], align 8
333331
// CHECK-A64-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SSPSP]], ptr [[S]], i32 0, i32 0
334332
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SP:%.*]], ptr [[A]], i32 0, i32 0
335333
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
@@ -353,11 +351,11 @@ struct SSpp {
353351
Spp a;
354352
};
355353
// CHECK-A64-LABEL: define dso_local void @_Z4TSpp4SSpp(
356-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
354+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
357355
// CHECK-A64-NEXT: [[ENTRY:.*:]]
358356
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SSPP:%.*]], align 8
359357
// CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SSPP]], ptr [[S]], i32 0, i32 0
360-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
358+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
361359
// CHECK-A64-NEXT: [[A:%.*]] = getelementptr inbounds nuw [[STRUCT_SSPP]], ptr [[S]], i32 0, i32 0
362360
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP:%.*]], ptr [[A]], i32 0, i32 0
363361
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
@@ -382,10 +380,10 @@ struct SSp : public Sp {
382380
int* b;
383381
};
384382
// CHECK-A64-LABEL: define dso_local void @_Z3TSp3SSp(
385-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
383+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
386384
// CHECK-A64-NEXT: [[ENTRY:.*:]]
387385
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SSP:%.*]], align 8
388-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[S]], align 8
386+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[S]], align 8
389387
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SP:%.*]], ptr [[S]], i32 0, i32 0
390388
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 8
391389
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4
@@ -433,11 +431,11 @@ struct Spa {
433431
int* xs[1];
434432
};
435433
// CHECK-A64-LABEL: define dso_local void @_Z3Tpa3Spa(
436-
// CHECK-A64-SAME: i64 [[S_COERCE:%.*]]) #[[ATTR0]] {
434+
// CHECK-A64-SAME: ptr [[S_COERCE:%.*]]) #[[ATTR0]] {
437435
// CHECK-A64-NEXT: [[ENTRY:.*:]]
438436
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SPA:%.*]], align 8
439437
// CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPA]], ptr [[S]], i32 0, i32 0
440-
// CHECK-A64-NEXT: store i64 [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
438+
// CHECK-A64-NEXT: store ptr [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
441439
// CHECK-A64-NEXT: [[XS:%.*]] = getelementptr inbounds nuw [[STRUCT_SPA]], ptr [[S]], i32 0, i32 0
442440
// CHECK-A64-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [1 x ptr], ptr [[XS]], i64 0, i64 0
443441
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
@@ -463,11 +461,11 @@ struct Spa2 {
463461
int* xs[2];
464462
};
465463
// CHECK-A64-LABEL: define dso_local void @_Z4Tpa24Spa2(
466-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
464+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
467465
// CHECK-A64-NEXT: [[ENTRY:.*:]]
468466
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SPA2:%.*]], align 8
469467
// CHECK-A64-NEXT: [[COERCE_DIVE:%.*]] = getelementptr inbounds nuw [[STRUCT_SPA2]], ptr [[S]], i32 0, i32 0
470-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
468+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[COERCE_DIVE]], align 8
471469
// CHECK-A64-NEXT: [[XS:%.*]] = getelementptr inbounds nuw [[STRUCT_SPA2]], ptr [[S]], i32 0, i32 0
472470
// CHECK-A64-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x ptr], ptr [[XS]], i64 0, i64 0
473471
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[ARRAYIDX]], align 8
@@ -523,10 +521,10 @@ struct __attribute__((aligned(16))) Spp_align16 {
523521
int *x, *y;
524522
};
525523
// CHECK-A64-LABEL: define dso_local void @_Z11Tpp_align1611Spp_align16(
526-
// CHECK-A64-SAME: [2 x i64] [[S_COERCE:%.*]]) #[[ATTR0]] {
524+
// CHECK-A64-SAME: [2 x ptr] [[S_COERCE:%.*]]) #[[ATTR0]] {
527525
// CHECK-A64-NEXT: [[ENTRY:.*:]]
528526
// CHECK-A64-NEXT: [[S:%.*]] = alloca [[STRUCT_SPP_ALIGN16:%.*]], align 16
529-
// CHECK-A64-NEXT: store [2 x i64] [[S_COERCE]], ptr [[S]], align 16
527+
// CHECK-A64-NEXT: store [2 x ptr] [[S_COERCE]], ptr [[S]], align 16
530528
// CHECK-A64-NEXT: [[X:%.*]] = getelementptr inbounds nuw [[STRUCT_SPP_ALIGN16]], ptr [[S]], i32 0, i32 0
531529
// CHECK-A64-NEXT: [[TMP0:%.*]] = load ptr, ptr [[X]], align 16
532530
// CHECK-A64-NEXT: store i32 1, ptr [[TMP0]], align 4

‎clang/test/CodeGen/ptrauth-in-c-struct.c‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -158,7 +158,7 @@ void test_copy_constructor_SI(SI *s) {
158158
SI t = *s;
159159
}
160160

161-
// CHECK: define void @test_parameter_SI(i64 %{{.*}})
161+
// CHECK: define void @test_parameter_SI(ptr %{{.*}})
162162
// CHECK-NOT: call
163163
// CHECK: ret void
164164

‎clang/test/CodeGenCXX/ptrauth-qualifier-struct.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -99,7 +99,7 @@ void testMoveAssignment(SA a) {
9999
t = static_cast<SA &&>(a);
100100
}
101101

102-
// CHECK: define {{.*}}void @_Z19testCopyConstructor2SI(i
102+
// CHECK: define {{.*}}void @_Z19testCopyConstructor2SI(
103103
// CHECK: call void @llvm.memcpy.p0.p0.i64(
104104

105105
void testCopyConstructor(SI a) {

‎clang/test/CodeGenCXX/trivial_abi.cpp‎

Lines changed: 5 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -68,11 +68,10 @@ struct D0 : B0, B1 {
6868

6969
Small D0::m0() { return {}; }
7070

71-
// CHECK: define{{.*}} void @_Z14testParamSmall5Small(i64 %[[A_COERCE:.*]])
71+
// CHECK: define{{.*}} void @_Z14testParamSmall5Small(ptr %[[A_COERCE:.*]])
7272
// CHECK: %[[A:.*]] = alloca %[[STRUCT_SMALL]], align 8
7373
// CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds nuw %[[STRUCT_SMALL]], ptr %[[A]], i32 0, i32 0
74-
// CHECK: %[[COERCE_VAL_IP:.*]] = inttoptr i64 %[[A_COERCE]] to ptr
75-
// CHECK: store ptr %[[COERCE_VAL_IP]], ptr %[[COERCE_DIVE]], align 8
74+
// CHECK: store ptr %[[A_COERCE]], ptr %[[COERCE_DIVE]], align 8
7675
// CHECK: %[[CALL:.*]] = call noundef ptr @_ZN5SmallD1Ev(ptr {{[^,]*}} %[[A]])
7776
// CHECK: ret void
7877
// CHECK: }
@@ -101,8 +100,7 @@ Small testReturnSmall() {
101100
// CHECK: %[[CALL1:.*]] = call noundef ptr @_ZN5SmallC1ERKS_(ptr {{[^,]*}} %[[AGG_TMP]], ptr noundef nonnull align 8 dereferenceable(8) %[[T]])
102101
// CHECK: %[[COERCE_DIVE:.*]] = getelementptr inbounds nuw %[[STRUCT_SMALL]], ptr %[[AGG_TMP]], i32 0, i32 0
103102
// CHECK: %[[V0:.*]] = load ptr, ptr %[[COERCE_DIVE]], align 8
104-
// CHECK: %[[COERCE_VAL_PI:.*]] = ptrtoint ptr %[[V0]] to i64
105-
// CHECK: call void @_Z14testParamSmall5Small(i64 %[[COERCE_VAL_PI]])
103+
// CHECK: call void @_Z14testParamSmall5Small(ptr %[[V0]])
106104
// CHECK: %[[CALL2:.*]] = call noundef ptr @_ZN5SmallD1Ev(ptr {{[^,]*}} %[[T]])
107105
// CHECK: ret void
108106
// CHECK: }
@@ -120,8 +118,7 @@ void testCallSmall0() {
120118
// CHECK: store ptr %[[COERCE_VAL_IP]], ptr %[[COERCE_DIVE]], align 8
121119
// CHECK: %[[COERCE_DIVE1:.*]] = getelementptr inbounds nuw %[[STRUCT_SMALL]], ptr %[[AGG_TMP]], i32 0, i32 0
122120
// CHECK: %[[V0:.*]] = load ptr, ptr %[[COERCE_DIVE1]], align 8
123-
// CHECK: %[[COERCE_VAL_PI:.*]] = ptrtoint ptr %[[V0]] to i64
124-
// CHECK: call void @_Z14testParamSmall5Small(i64 %[[COERCE_VAL_PI]])
121+
// CHECK: call void @_Z14testParamSmall5Small(ptr %[[V0]])
125122
// CHECK: ret void
126123
// CHECK: }
127124

@@ -226,7 +223,7 @@ NonTrivial testReturnHasNonTrivial() {
226223
// CHECK: call noundef ptr @_ZN5SmallC1Ev(ptr {{[^,]*}} %[[AGG_TMP]])
227224
// CHECK: invoke noundef ptr @_ZN5SmallC1Ev(ptr {{[^,]*}} %[[AGG_TMP1]])
228225

229-
// CHECK: call void @_Z20calleeExceptionSmall5SmallS_(i64 %{{.*}}, i64 %{{.*}})
226+
// CHECK: call void @_Z20calleeExceptionSmall5SmallS_(ptr %{{.*}}, ptr %{{.*}})
230227
// CHECK-NEXT: ret void
231228

232229
// CHECK: landingpad { ptr, i32 }

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