clang format

Author: inbelic

llvm/lib/Target/SPIRV/SPIRVInstructionSelector.cpp

@@ -1654,18 +1654,17 @@ bool SPIRVInstructionSelector::selectIntegerDot(Register ResVReg,
 
   auto DotOp = Signed ? SPIRV::OpSDot : SPIRV::OpUDot;
   return BuildMI(BB, I, I.getDebugLoc(), TII.get(DotOp))
-              .addDef(ResVReg)
-              .addUse(GR.getSPIRVTypeID(ResType))
-              .addUse(I.getOperand(2).getReg())
-              .addUse(I.getOperand(3).getReg())
-              .constrainAllUses(TII, TRI, RBI);
+      .addDef(ResVReg)
+      .addUse(GR.getSPIRVTypeID(ResType))
+      .addUse(I.getOperand(2).getReg())
+      .addUse(I.getOperand(3).getReg())
+      .constrainAllUses(TII, TRI, RBI);
 }
 
 // Since pre-1.6 SPIRV has no integer dot implementation,
 // expand by piecewise multiplying and adding the results
-bool SPIRVInstructionSelector::selectIntegerDotExpansion(Register ResVReg,
-                                                const SPIRVType *ResType,
-                                                MachineInstr &I) const {
+bool SPIRVInstructionSelector::selectIntegerDotExpansion(
+    Register ResVReg, const SPIRVType *ResType, MachineInstr &I) const {
   assert(I.getNumOperands() == 4);
   assert(I.getOperand(2).isReg());
   assert(I.getOperand(3).isReg());
@@ -2663,7 +2662,8 @@ bool SPIRVInstructionSelector::selectIntrinsic(Register ResVReg,
   case Intrinsic::spv_sdot:
     if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_integer_dot_product) ||
         STI.isAtLeastSPIRVVer(VersionTuple(1, 6)))
-      return selectIntegerDot(ResVReg, ResType, I, /*Signed=*/IID == Intrinsic::spv_sdot);
+      return selectIntegerDot(ResVReg, ResType, I,
+                              /*Signed=*/IID == Intrinsic::spv_sdot);
     return selectIntegerDotExpansion(ResVReg, ResType, I);
   case Intrinsic::spv_dot4add_i8packed:
     if (STI.canUseExtension(SPIRV::Extension::SPV_KHR_integer_dot_product) ||

llvm/lib/Target/SPIRV/SPIRVModuleAnalysis.cpp

@@ -1015,7 +1015,8 @@ static void AddDotProductRequirements(const MachineInstr &MI,
   const MachineRegisterInfo &MRI = MI.getMF()->getRegInfo();
   assert(MI.getOperand(2).isReg() && "Unexpected operand in dot");
   const MachineInstr *InputInstr = MRI.getVRegDef(MI.getOperand(2).getReg());
-  assert(InputInstr->getOperand(1).isReg() && "Unexpected operand in dot input");
+  assert(InputInstr->getOperand(1).isReg() &&
+         "Unexpected operand in dot input");
 
   Register TypeReg = InputInstr->getOperand(1).getReg();
   SPIRVType *TypeDef = MRI.getVRegDef(TypeReg);
@@ -1026,8 +1027,8 @@ static void AddDotProductRequirements(const MachineInstr &MI,
     SPIRVType *ScalarTypeDef = MRI.getVRegDef(TypeDef->getOperand(1).getReg());
     assert(ScalarTypeDef->getOpcode() == SPIRV::OpTypeInt);
     if (ScalarTypeDef->getOperand(1).getImm() == 8) {
-      assert(TypeDef->getOperand(2).getImm() == 4
-             && "Dot operand of 8-bit integer type requires 4 components");
+      assert(TypeDef->getOperand(2).getImm() == 4 &&
+             "Dot operand of 8-bit integer type requires 4 components");
       Reqs.addCapability(SPIRV::Capability::DotProductInput4x8Bit);
     } else {
       Reqs.addCapability(SPIRV::Capability::DotProductInputAll);