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Change to named enum
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-27
lines changed

5 files changed

+60
-27
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‎clang/include/clang/CIR/Dialect/IR/CIROps.td‎

Lines changed: 34 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4018,6 +4018,39 @@ def CIR_RotateOp : CIR_Op<"rotate", [Pure, SameOperandsAndResultType]> {
40184018
let hasFolder = 1;
40194019
}
40204020

4021+
//===----------------------------------------------------------------------===//
4022+
// FPClass Test Flags
4023+
//===----------------------------------------------------------------------===//
4024+
4025+
def FPClassTestEnum : CIR_I32EnumAttr<"FPClassTest", "floating-point class test flags", [
4026+
// Basic flags
4027+
I32EnumAttrCase<"SignalingNaN", 1, "fcSNan">,
4028+
I32EnumAttrCase<"QuietNaN", 2, "fcQNan">,
4029+
I32EnumAttrCase<"NegativeInfinity", 4, "fcNegInf">,
4030+
I32EnumAttrCase<"NegativeNormal", 8, "fcNegNormal">,
4031+
I32EnumAttrCase<"NegativeSubnormal", 16, "fcNegSubnormal">,
4032+
I32EnumAttrCase<"NegativeZero", 32, "fcNegZero">,
4033+
I32EnumAttrCase<"PositiveZero", 64, "fcPosZero">,
4034+
I32EnumAttrCase<"PositiveSubnormal", 128, "fcPosSubnormal">,
4035+
I32EnumAttrCase<"PositiveNormal", 256, "fcPosNormal">,
4036+
I32EnumAttrCase<"PositiveInfinity", 512, "fcPosInf">,
4037+
4038+
// Composite flags
4039+
I32EnumAttrCase<"Nan", 3, "fcNan">, // fcSNan | fcQNan
4040+
I32EnumAttrCase<"Infinity", 516, "fcInf">, // fcPosInf | fcNegInf
4041+
I32EnumAttrCase<"Normal", 264, "fcNormal">, // fcPosNormal | fcNegNormal
4042+
I32EnumAttrCase<"Subnormal", 144, "fcSubnormal">, // fcPosSubnormal | fcNegSubnormal
4043+
I32EnumAttrCase<"Zero", 96, "fcZero">, // fcPosZero | fcNegZero
4044+
I32EnumAttrCase<"PositiveFinite", 448, "fcPosFinite">,// fcPosNormal | fcPosSubnormal | fcPosZero
4045+
I32EnumAttrCase<"NegativeFinite", 56, "fcNegFinite">, // fcNegNormal | fcNegSubnormal | fcNegZero
4046+
I32EnumAttrCase<"Finite", 504, "fcFinite">, // fcPosFinite | fcNegFinite
4047+
I32EnumAttrCase<"Positive", 960, "fcPositive">, // fcPosFinite | fcPosInf
4048+
I32EnumAttrCase<"Negative", 60, "fcNegative">, // fcNegFinite | fcNegInf
4049+
I32EnumAttrCase<"All", 1023, "fcAllFlags">, // fcNan | fcInf | fcFinite
4050+
]> {
4051+
let cppNamespace = "::cir";
4052+
}
4053+
40214054
def CIR_IsFPClassOp : CIR_Op<"is_fp_class"> {
40224055
let summary = "Corresponding to the `__builtin_fpclassify` builtin function in clang";
40234056

@@ -4044,7 +4077,7 @@ def CIR_IsFPClassOp : CIR_Op<"is_fp_class"> {
40444077
}];
40454078

40464079
let arguments = (ins CIR_AnyFloatType:$src,
4047-
I32Attr:$flags);
4080+
FPClassTestEnum:$flags);
40484081
let results = (outs CIR_BoolType:$result);
40494082
let assemblyFormat = [{
40504083
$src `,` $flags `:` functional-type($src, $result) attr-dict

‎clang/lib/CIR/CodeGen/CIRGenBuilder.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -335,7 +335,7 @@ class CIRGenBuilderTy : public cir::CIRBaseBuilderTy {
335335
}
336336

337337
cir::IsFPClassOp createIsFPClass(mlir::Location loc, mlir::Value src,
338-
unsigned flags) {
338+
cir::FPClassTest flags) {
339339
return cir::IsFPClassOp::create(*this, loc, src, flags);
340340
}
341341

‎clang/lib/CIR/CodeGen/CIRGenBuiltin.cpp‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -533,7 +533,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
533533
assert(!cir::MissingFeatures::fpConstraints());
534534
mlir::Location loc = getLoc(e->getBeginLoc());
535535
return RValue::get(builder.createBoolToInt(
536-
builder.createIsFPClass(loc, v, FPClassTest::fcNan),
536+
builder.createIsFPClass(loc, v, cir::FPClassTest::Nan),
537537
convertType(e->getType())));
538538
}
539539

@@ -542,7 +542,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
542542
mlir::Value v = emitScalarExpr(e->getArg(0));
543543
mlir::Location loc = getLoc(e->getBeginLoc());
544544
return RValue::get(builder.createBoolToInt(
545-
builder.createIsFPClass(loc, v, FPClassTest::fcSNan),
545+
builder.createIsFPClass(loc, v, cir::FPClassTest::SignalingNaN),
546546
convertType(e->getType())));
547547
}
548548

@@ -552,7 +552,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
552552
assert(!cir::MissingFeatures::fpConstraints());
553553
mlir::Location loc = getLoc(e->getBeginLoc());
554554
return RValue::get(builder.createBoolToInt(
555-
builder.createIsFPClass(loc, v, FPClassTest::fcInf),
555+
builder.createIsFPClass(loc, v, cir::FPClassTest::Infinity),
556556
convertType(e->getType())));
557557
}
558558

@@ -568,7 +568,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
568568
assert(!cir::MissingFeatures::fpConstraints());
569569
mlir::Location loc = getLoc(e->getBeginLoc());
570570
return RValue::get(builder.createBoolToInt(
571-
builder.createIsFPClass(loc, v, FPClassTest::fcFinite),
571+
builder.createIsFPClass(loc, v, cir::FPClassTest::Finite),
572572
convertType(e->getType())));
573573
}
574574

@@ -577,7 +577,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
577577
mlir::Value v = emitScalarExpr(e->getArg(0));
578578
mlir::Location loc = getLoc(e->getBeginLoc());
579579
return RValue::get(builder.createBoolToInt(
580-
builder.createIsFPClass(loc, v, FPClassTest::fcNormal),
580+
builder.createIsFPClass(loc, v, cir::FPClassTest::Normal),
581581
convertType(e->getType())));
582582
}
583583

@@ -586,7 +586,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
586586
mlir::Value v = emitScalarExpr(e->getArg(0));
587587
mlir::Location loc = getLoc(e->getBeginLoc());
588588
return RValue::get(builder.createBoolToInt(
589-
builder.createIsFPClass(loc, v, FPClassTest::fcSubnormal),
589+
builder.createIsFPClass(loc, v, cir::FPClassTest::Subnormal),
590590
convertType(e->getType())));
591591
}
592592

@@ -595,7 +595,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
595595
mlir::Value v = emitScalarExpr(e->getArg(0));
596596
mlir::Location loc = getLoc(e->getBeginLoc());
597597
return RValue::get(builder.createBoolToInt(
598-
builder.createIsFPClass(loc, v, FPClassTest::fcZero),
598+
builder.createIsFPClass(loc, v, cir::FPClassTest::Zero),
599599
convertType(e->getType())));
600600
}
601601
case Builtin::BI__builtin_isfpclass: {
@@ -609,7 +609,7 @@ RValue CIRGenFunction::emitBuiltinExpr(const GlobalDecl &gd, unsigned builtinID,
609609
mlir::Location loc = getLoc(e->getBeginLoc());
610610
//
611611
return RValue::get(builder.createBoolToInt(
612-
builder.createIsFPClass(loc, v, test), convertType(e->getType())));
612+
builder.createIsFPClass(loc, v, cir::FPClassTest(test)), convertType(e->getType())));
613613
}
614614
}
615615

‎clang/lib/CIR/Lowering/DirectToLLVM/LowerToLLVM.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -674,10 +674,10 @@ mlir::LogicalResult CIRToLLVMIsFPClassOpLowering::matchAndRewrite(
674674
cir::IsFPClassOp op, OpAdaptor adaptor,
675675
mlir::ConversionPatternRewriter &rewriter) const {
676676
mlir::Value src = adaptor.getSrc();
677-
uint32_t flags = adaptor.getFlags();
677+
cir::FPClassTest flags = adaptor.getFlags();
678678
mlir::IntegerType retTy = rewriter.getI1Type();
679679

680-
rewriter.replaceOpWithNewOp<mlir::LLVM::IsFPClass>(op, retTy, src, flags);
680+
rewriter.replaceOpWithNewOp<mlir::LLVM::IsFPClass>(op, retTy, src, static_cast<uint32_t>(flags));
681681
return mlir::success();
682682
}
683683

‎clang/test/CIR/CodeGen/builtin-isfpclass.c‎

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -10,32 +10,32 @@ int finite(double);
1010
void test_is_finite(__fp16 *H, float F, double D, long double LD) {
1111
volatile int res;
1212
res = __builtin_isinf(*H);
13-
// CIR: cir.is_fp_class %{{.*}}, 516 : (!cir.f16) -> !cir.bool
13+
// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.f16) -> !cir.bool
1414
// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 516)
1515
// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 516)
1616

1717
res = __builtin_isinf(F);
18-
// CIR: cir.is_fp_class %{{.*}}, 516 : (!cir.float) -> !cir.bool
18+
// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.float) -> !cir.bool
1919
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 516)
2020
// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 516)
2121

2222
res = __builtin_isinf(D);
23-
// CIR: cir.is_fp_class %{{.*}}, 516 : (!cir.double) -> !cir.bool
23+
// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.double) -> !cir.bool
2424
// LLVM: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 516)
2525
// OGCG: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 516)
2626

2727
res = __builtin_isinf(LD);
28-
// CIR: cir.is_fp_class %{{.*}}, 516 : (!cir.long_double<!cir.f80>) -> !cir.bool
28+
// CIR: cir.is_fp_class %{{.*}}, fcInf : (!cir.long_double<!cir.f80>) -> !cir.bool
2929
// LLVM: call i1 @llvm.is.fpclass.f80(x86_fp80 {{.*}}, i32 516)
3030
// OGCG: call i1 @llvm.is.fpclass.f80(x86_fp80 {{.*}}, i32 516)
3131

3232
res = __builtin_isfinite(*H);
33-
// CIR: cir.is_fp_class %{{.*}}, 504 : (!cir.f16) -> !cir.bool
33+
// CIR: cir.is_fp_class %{{.*}}, fcFinite : (!cir.f16) -> !cir.bool
3434
// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 504)
3535
// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 504)
3636

3737
res = __builtin_isfinite(F);
38-
// CIR: cir.is_fp_class %{{.*}}, 504 : (!cir.float) -> !cir.bool
38+
// CIR: cir.is_fp_class %{{.*}}, fcFinite : (!cir.float) -> !cir.bool
3939
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
4040
// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
4141

@@ -44,25 +44,25 @@ void test_is_finite(__fp16 *H, float F, double D, long double LD) {
4444
// LLVM: call i32 @finite(double {{.*}})
4545
// OGCG: call i1 @llvm.is.fpclass.f64(double %20, i32 504)
4646
res = __builtin_isnormal(*H);
47-
// CIR: cir.is_fp_class %{{.*}}, 264 : (!cir.f16) -> !cir.bool
47+
// CIR: cir.is_fp_class %{{.*}}, fcNormal : (!cir.f16) -> !cir.bool
4848
// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 264)
4949
// OGCG: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 264)
5050

5151
res = __builtin_isnormal(F);
52-
// CIR: cir.is_fp_class %{{.*}}, 264 : (!cir.float) -> !cir.bool
52+
// CIR: cir.is_fp_class %{{.*}}, fcNormal : (!cir.float) -> !cir.bool
5353
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 264)
5454
// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 264)
5555

5656
res = __builtin_issubnormal(F);
57-
// CIR: cir.is_fp_class %{{.*}}, 144 : (!cir.float) -> !cir.bool
57+
// CIR: cir.is_fp_class %{{.*}}, fcSubnormal : (!cir.float) -> !cir.bool
5858
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 144)
5959
// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 144)
6060
res = __builtin_iszero(F);
61-
// CIR: cir.is_fp_class %{{.*}}, 96 : (!cir.float) -> !cir.bool
61+
// CIR: cir.is_fp_class %{{.*}}, fcZero : (!cir.float) -> !cir.bool
6262
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 96)
6363
// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 96)
6464
res = __builtin_issignaling(F);
65-
// CIR: cir.is_fp_class %{{.*}}, 1 : (!cir.float) -> !cir.bool
65+
// CIR: cir.is_fp_class %{{.*}}, fcSNan : (!cir.float) -> !cir.bool
6666
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 1)
6767
// OGCG: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 1)
6868
}
@@ -72,7 +72,7 @@ _Bool check_isfpclass_finite(float x) {
7272
}
7373

7474
// CIR: cir.func {{.*}}@check_isfpclass_finite
75-
// CIR: cir.is_fp_class %{{.*}}, 504 : (!cir.float)
75+
// CIR: cir.is_fp_class %{{.*}}, fcFinite : (!cir.float)
7676
// LLVM: @check_isfpclass_finite
7777
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 504)
7878
// OGCG: @check_isfpclass_finite
@@ -83,7 +83,7 @@ _Bool check_isfpclass_nan_f32(float x) {
8383
}
8484

8585
// CIR: cir.func {{.*}}@check_isfpclass_nan_f32
86-
// CIR: cir.is_fp_class %{{.*}}, 3 : (!cir.float)
86+
// CIR: cir.is_fp_class %{{.*}}, fcNan : (!cir.float)
8787
// LLVM: @check_isfpclass_nan_f32
8888
// LLVM: call i1 @llvm.is.fpclass.f32(float {{.*}}, i32 3)
8989
// OGCG: @check_isfpclass_nan_f32
@@ -95,7 +95,7 @@ _Bool check_isfpclass_snan_f64(double x) {
9595
}
9696

9797
// CIR: cir.func {{.*}}@check_isfpclass_snan_f64
98-
// CIR: cir.is_fp_class %{{.*}}, 1 : (!cir.double)
98+
// CIR: cir.is_fp_class %{{.*}}, fcSNan : (!cir.double)
9999
// LLVM: @check_isfpclass_snan_f64
100100
// LLVM: call i1 @llvm.is.fpclass.f64(double {{.*}}, i32 1)
101101
// OGCG: @check_isfpclass_snan_f64
@@ -107,7 +107,7 @@ _Bool check_isfpclass_zero_f16(_Float16 x) {
107107
}
108108

109109
// CIR: cir.func {{.*}}@check_isfpclass_zero_f16
110-
// CIR: cir.is_fp_class %{{.*}}, 96 : (!cir.f16)
110+
// CIR: cir.is_fp_class %{{.*}}, fcZero : (!cir.f16)
111111
// LLVM: @check_isfpclass_zero_f16
112112
// LLVM: call i1 @llvm.is.fpclass.f16(half {{.*}}, i32 96)
113113
// OGCG: @check_isfpclass_zero_f16

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