Make the tests non-trivial.

Author: rj-jesus

llvm/test/CodeGen/AArch64/aarch64-split-and-bitmask-immediate.ll

@@ -270,12 +270,12 @@ define i32 @test1_ands(i32 %a) {
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    and w8, w0, #0x3ffc00
 ; CHECK-NEXT:    ands w8, w8, #0xffe007ff
-; CHECK-NEXT:    csel w0, w8, wzr, eq
+; CHECK-NEXT:    csel w0, w0, w8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i32 %a, 2098176
   %c = icmp eq i32 %ands, 0
-  %r = select i1 %c, i32 %ands, i32 0
+  %r = select i1 %c, i32 %a, i32 %ands
   ret i32 %r
 }
 
@@ -285,12 +285,12 @@ define i32 @test2_ands(i32 %a) {
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    mov w8, #135 // =0x87
 ; CHECK-NEXT:    ands w8, w0, w8
-; CHECK-NEXT:    csel w0, w8, wzr, eq
+; CHECK-NEXT:    csel w0, w0, w8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i32 %a, 135
   %c = icmp eq i32 %ands, 0
-  %r = select i1 %c, i32 %ands, i32 0
+  %r = select i1 %c, i32 %a, i32 %ands
   ret i32 %r
 }
 
@@ -302,12 +302,12 @@ define i32 @test3_ands(i32 %a) {
 ; CHECK-NEXT:    mov w8, #1024 // =0x400
 ; CHECK-NEXT:    movk w8, #33, lsl #16
 ; CHECK-NEXT:    ands w8, w0, w8
-; CHECK-NEXT:    csel w0, w8, wzr, eq
+; CHECK-NEXT:    csel w0, w0, w8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i32 %a, 2163712
   %c = icmp eq i32 %ands, 0
-  %r = select i1 %c, i32 %ands, i32 0
+  %r = select i1 %c, i32 %a, i32 %ands
   ret i32 %r
 }
 
@@ -316,12 +316,12 @@ define i64 @test4_ands(i64 %a) {
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    and x8, x0, #0x3ffc00
 ; CHECK-NEXT:    ands x8, x8, #0xffffffffffe007ff
-; CHECK-NEXT:    csel x0, x8, xzr, eq
+; CHECK-NEXT:    csel x0, x0, x8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i64 %a, 2098176
   %c = icmp eq i64 %ands, 0
-  %r = select i1 %c, i64 %ands, i64 0
+  %r = select i1 %c, i64 %a, i64 %ands
   ret i64 %r
 }
 
@@ -330,12 +330,12 @@ define i64 @test5_ands(i64 %a) {
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    and x8, x0, #0x3ffffc000
 ; CHECK-NEXT:    ands x8, x8, #0xfffffffe00007fff
-; CHECK-NEXT:    csel x0, x8, xzr, eq
+; CHECK-NEXT:    csel x0, x0, x8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i64 %a, 8589950976
   %c = icmp eq i64 %ands, 0
-  %r = select i1 %c, i64 %ands, i64 0
+  %r = select i1 %c, i64 %a, i64 %ands
   ret i64 %r
 }
 
@@ -345,12 +345,12 @@ define i64 @test6_ands(i64 %a) {
 ; CHECK:       // %bb.0: // %entry
 ; CHECK-NEXT:    mov w8, #135 // =0x87
 ; CHECK-NEXT:    ands x8, x0, x8
-; CHECK-NEXT:    csel x0, x8, xzr, eq
+; CHECK-NEXT:    csel x0, x0, x8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i64 %a, 135
   %c = icmp eq i64 %ands, 0
-  %r = select i1 %c, i64 %ands, i64 0
+  %r = select i1 %c, i64 %a, i64 %ands
   ret i64 %r
 }
 
@@ -362,11 +362,11 @@ define i64 @test7_ands(i64 %a) {
 ; CHECK-NEXT:    mov w8, #1024 // =0x400
 ; CHECK-NEXT:    movk w8, #33, lsl #16
 ; CHECK-NEXT:    ands x8, x0, x8
-; CHECK-NEXT:    csel x0, x8, xzr, eq
+; CHECK-NEXT:    csel x0, x0, x8, eq
 ; CHECK-NEXT:    ret
 entry:
   %ands = and i64 %a, 2163712
   %c = icmp eq i64 %ands, 0
-  %r = select i1 %c, i64 %ands, i64 0
+  %r = select i1 %c, i64 %a, i64 %ands
   ret i64 %r
 }