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Merging r355116 and r355117:
------------------------------------------------------------------------ r355116 | ctopper | 2019-02-28 19:49:29 +0100 (Thu, 28 Feb 2019) | 7 lines [X86] Don't peek through bitcasts before checking ISD::isBuildVectorOfConstantSDNodes in combineTruncatedArithmetic We don't have any combines that can look through a bitcast to truncate a build vector of constants. So the truncate will stick around and give us something like this pattern (binop (trunc X), (trunc (bitcast (build_vector)))) which has two truncates in it. Which will be reversed by hoistLogicOpWithSameOpcodeHands in the generic DAG combiner. Thus causing an infinite loop. Even if we had a combine for (truncate (bitcast (build_vector))), I think it would need to be implemented in getNode otherwise DAG combiner visit ordering would probably still visit the binop first and reverse it. Or combineTruncatedArithmetic would need to do its own constant folding. Differential Revision: https://reviews.llvm.org/D58705 ------------------------------------------------------------------------ ------------------------------------------------------------------------ r355117 | ctopper | 2019-02-28 19:50:16 +0100 (Thu, 28 Feb 2019) | 1 line [X86] Add test case that was supposed to go with r355116. ------------------------------------------------------------------------ llvm-svn: 355310
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llvm/lib/Target/X86/X86ISelLowering.cpp

Lines changed: 5 additions & 2 deletions
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@@ -38134,8 +38134,11 @@ static SDValue combineTruncatedArithmetic(SDNode *N, SelectionDAG &DAG,
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return true;
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// See if this is a single use constant which can be constant folded.
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SDValue BC = peekThroughOneUseBitcasts(Op);
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return ISD::isBuildVectorOfConstantSDNodes(BC.getNode());
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// NOTE: We don't peek throught bitcasts here because there is currently
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// no support for constant folding truncate+bitcast+vector_of_constants. So
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// we'll just send up with a truncate on both operands which will
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// get turned back into (truncate (binop)) causing an infinite loop.
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return ISD::isBuildVectorOfConstantSDNodes(Op.getNode());
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};
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auto TruncateArithmetic = [&](SDValue N0, SDValue N1) {

llvm/test/CodeGen/X86/pr40891.ll

Lines changed: 22 additions & 0 deletions
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@@ -0,0 +1,22 @@
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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=avx2 | FileCheck %s
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; Make sure this sequence doesn't hang in DAG combine.
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define <8 x i32> @foo(<8 x i64> %x, <4 x i64> %y) {
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; CHECK-LABEL: foo:
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; CHECK: # %bb.0:
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; CHECK-NEXT: vandps %ymm2, %ymm0, %ymm0
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; CHECK-NEXT: vandps {{\.LCPI.*}}, %ymm1, %ymm1
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; CHECK-NEXT: vpermilps {{.*#+}} ymm0 = ymm0[0,2,2,3,4,6,6,7]
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; CHECK-NEXT: vpermpd {{.*#+}} ymm0 = ymm0[0,2,2,3]
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; CHECK-NEXT: vpermilps {{.*#+}} ymm1 = ymm1[0,2,2,3,4,6,6,7]
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; CHECK-NEXT: vpermpd {{.*#+}} ymm1 = ymm1[0,2,2,3]
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; CHECK-NEXT: vinsertf128 $1, %xmm1, %ymm0, %ymm0
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; CHECK-NEXT: retl
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%a = shufflevector <4 x i64> %y, <4 x i64> <i64 12345, i64 67890, i64 13579, i64 24680>, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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%b = and <8 x i64> %x, %a
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%c = trunc <8 x i64> %b to <8 x i32>
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ret <8 x i32> %c
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}
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