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insertpoint fix
1 parent b3b8773 commit e77381e

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2 files changed

+5
-4
lines changed

2 files changed

+5
-4
lines changed

llvm/lib/Frontend/OpenMP/OMPIRBuilder.cpp

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -5206,10 +5206,11 @@ void OpenMPIRBuilder::applySimd(CanonicalLoopInfo *CanonicalLoop,
52065206
Loop *L = LI.getLoopFor(CanonicalLoop->getHeader());
52075207
if (AlignedVars.size()) {
52085208
InsertPointTy IP = Builder.saveIP();
5209-
Builder.SetInsertPoint(CanonicalLoop->getPreheader()->getTerminator());
52105209
for (auto &AlignedItem : AlignedVars) {
52115210
Value *AlignedPtr = AlignedItem.first;
52125211
Value *Alignment = AlignedItem.second;
5212+
Instruction *loadInst = dyn_cast<Instruction>(AlignedPtr);
5213+
Builder.SetInsertPoint(loadInst->getNextNode());
52135214
Builder.CreateAlignmentAssumption(F->getDataLayout(),
52145215
AlignedPtr, Alignment);
52155216
}

mlir/test/Target/LLVMIR/openmp-simd-aligned.mlir

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -3,7 +3,6 @@
33
//CHECK-LABEL: define void @_QPsimd_aligned_pointer() {
44
//CHECK: %[[A_PTR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8 }, i64 1, align 8
55
//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_PTR]], align 8
6-
//CHECK: omp_loop.preheader: ; preds = %0
76
//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
87
llvm.func @_QPsimd_aligned_pointer() {
98
%1 = llvm.mlir.constant(1 : i64) : i64
@@ -17,14 +16,14 @@ llvm.func @_QPsimd_aligned_pointer() {
1716
llvm.store %arg0, %3 : i32, !llvm.ptr
1817
omp.yield
1918
}
19+
omp.terminator
2020
}
2121
llvm.return
2222
}
2323

2424
//CHECK-LABEL: define void @_QPsimd_aligned_cptr() {
2525
//CHECK: %[[A_CPTR:.*]] = alloca %_QM__fortran_builtinsT__builtin_c_ptr, i64 1, align 8
2626
//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_CPTR]], align 8
27-
//CHECK: omp_loop.preheader: ; preds = %0
2827
//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
2928
llvm.func @_QPsimd_aligned_cptr() {
3029
%0 = llvm.mlir.constant(1 : i64) : i64
@@ -39,14 +38,14 @@ llvm.func @_QPsimd_aligned_cptr() {
3938
llvm.store %arg0, %3 : i32, !llvm.ptr
4039
omp.yield
4140
}
41+
omp.terminator
4242
}
4343
llvm.return
4444
}
4545

4646
//CHECK-LABEL: define void @_QPsimd_aligned_allocatable() {
4747
//CHECK: %[[A_ADDR:.*]] = alloca { ptr, i64, i32, i8, i8, i8, i8, [1 x [3 x i64]] }, i64 1, align 8
4848
//CHECK: %[[A_VAL:.*]] = load ptr, ptr %[[A_ADDR]], align 8
49-
//CHECK: omp_loop.preheader: ; preds = %0
5049
//CHECK: call void @llvm.assume(i1 true) [ "align"(ptr %[[A_VAL]], i64 256) ]
5150
llvm.func @_QPsimd_aligned_allocatable() {
5251
%0 = llvm.mlir.constant(1 : i64) : i64
@@ -58,6 +57,7 @@ llvm.func @_QPsimd_aligned_allocatable() {
5857
omp.loop_nest (%arg0) : i32 = (%2) to (%3) inclusive step (%4) {
5958
omp.yield
6059
}
60+
omp.terminator
6161
}
6262
llvm.return
6363
}

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