Update register names for NVPTX/boolean-patterns.ll

Author: justinfargnoli

llvm/test/CodeGen/NVPTX/boolean-patterns.ll

@@ -43,14 +43,14 @@ define i1 @m2and_ri(i1 %a) {
 define i1 @select2or(i1 %a, i1 %b) {
 ; CHECK-LABEL: select2or(
 ; CHECK:       {
-; CHECK-NEXT:    .reg .b16 %rs<4>;
+; CHECK-NEXT:    .reg .b16 %rs<5>;
 ; CHECK-NEXT:    .reg .b32 %r<3>;
 ; CHECK-EMPTY:
 ; CHECK-NEXT:  // %bb.0:
 ; CHECK-NEXT:    ld.param.u8 %rs1, [select2or_param_0];
 ; CHECK-NEXT:    ld.param.u8 %rs2, [select2or_param_1];
-; CHECK-NEXT:    or.b16 %rs3, %rs1, %rs2;
-; CHECK-NEXT:    cvt.u32.u16 %r1, %rs3;
+; CHECK-NEXT:    or.b16 %rs4, %rs1, %rs2;
+; CHECK-NEXT:    cvt.u32.u16 %r1, %rs4;
 ; CHECK-NEXT:    and.b32 %r2, %r1, 1;
 ; CHECK-NEXT:    st.param.b32 [func_retval0+0], %r2;
 ; CHECK-NEXT:    ret;
@@ -61,14 +61,14 @@ define i1 @select2or(i1 %a, i1 %b) {
 define i1 @select2and(i1 %a, i1 %b) {
 ; CHECK-LABEL: select2and(
 ; CHECK:       {
-; CHECK-NEXT:    .reg .b16 %rs<4>;
+; CHECK-NEXT:    .reg .b16 %rs<5>;
 ; CHECK-NEXT:    .reg .b32 %r<3>;
 ; CHECK-EMPTY:
 ; CHECK-NEXT:  // %bb.0:
 ; CHECK-NEXT:    ld.param.u8 %rs1, [select2and_param_0];
 ; CHECK-NEXT:    ld.param.u8 %rs2, [select2and_param_1];
-; CHECK-NEXT:    and.b16 %rs3, %rs1, %rs2;
-; CHECK-NEXT:    cvt.u32.u16 %r1, %rs3;
+; CHECK-NEXT:    and.b16 %rs4, %rs1, %rs2;
+; CHECK-NEXT:    cvt.u32.u16 %r1, %rs4;
 ; CHECK-NEXT:    and.b32 %r2, %r1, 1;
 ; CHECK-NEXT:    st.param.b32 [func_retval0+0], %r2;
 ; CHECK-NEXT:    ret;