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!fixup check trailing zeros again
1 parent badd922 commit e80224d

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4 files changed

+32
-32
lines changed

4 files changed

+32
-32
lines changed

‎llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp‎

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -837,12 +837,12 @@ Value *VPInstruction::generate(VPTransformState &State) {
837837
unsigned LastOpIdx = getNumOperands() - 1;
838838
Value *Res = nullptr;
839839
for (int Idx = LastOpIdx; Idx >= 0; --Idx) {
840-
Value *Current = Builder.CreateCountTrailingZeroElems(
840+
Value *TrailingZeros = Builder.CreateCountTrailingZeroElems(
841841
Builder.getInt64Ty(), State.get(getOperand(Idx)), true, Name);
842-
Current = Builder.CreateAdd(
843-
Builder.CreateMul(RuntimeVF, Builder.getInt64(Idx)), Current);
842+
Value *Current = Builder.CreateAdd(
843+
Builder.CreateMul(RuntimeVF, Builder.getInt64(Idx)), TrailingZeros);
844844
if (Res) {
845-
Value *Cmp = Builder.CreateICmpNE(Current, RuntimeBitwidth);
845+
Value *Cmp = Builder.CreateICmpNE(TrailingZeros, RuntimeBitwidth);
846846
Res = Builder.CreateSelect(Cmp, Current, Res);
847847
} else {
848848
Res = Current;

‎llvm/test/Transforms/LoopVectorize/AArch64/single-early-exit-interleave.ll‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -83,17 +83,17 @@ define i64 @same_exit_block_pre_inc_use1() #0 {
8383
; CHECK-NEXT: [[TMP46:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv16i1(<vscale x 16 x i1> [[TMP31]], i1 true)
8484
; CHECK-NEXT: [[TMP58:%.*]] = mul i64 [[TMP42]], 2
8585
; CHECK-NEXT: [[TMP50:%.*]] = add i64 [[TMP58]], [[TMP46]]
86-
; CHECK-NEXT: [[TMP47:%.*]] = icmp ne i64 [[TMP50]], [[TMP43]]
86+
; CHECK-NEXT: [[TMP47:%.*]] = icmp ne i64 [[TMP46]], [[TMP43]]
8787
; CHECK-NEXT: [[TMP51:%.*]] = select i1 [[TMP47]], i64 [[TMP50]], i64 [[TMP45]]
8888
; CHECK-NEXT: [[TMP52:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv16i1(<vscale x 16 x i1> [[TMP30]], i1 true)
8989
; CHECK-NEXT: [[TMP64:%.*]] = mul i64 [[TMP42]], 1
9090
; CHECK-NEXT: [[TMP56:%.*]] = add i64 [[TMP64]], [[TMP52]]
91-
; CHECK-NEXT: [[TMP53:%.*]] = icmp ne i64 [[TMP56]], [[TMP43]]
91+
; CHECK-NEXT: [[TMP53:%.*]] = icmp ne i64 [[TMP52]], [[TMP43]]
9292
; CHECK-NEXT: [[TMP57:%.*]] = select i1 [[TMP53]], i64 [[TMP56]], i64 [[TMP51]]
9393
; CHECK-NEXT: [[TMP15:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.nxv16i1(<vscale x 16 x i1> [[TMP11]], i1 true)
9494
; CHECK-NEXT: [[TMP65:%.*]] = mul i64 [[TMP42]], 0
9595
; CHECK-NEXT: [[TMP60:%.*]] = add i64 [[TMP65]], [[TMP15]]
96-
; CHECK-NEXT: [[TMP59:%.*]] = icmp ne i64 [[TMP60]], [[TMP43]]
96+
; CHECK-NEXT: [[TMP59:%.*]] = icmp ne i64 [[TMP15]], [[TMP43]]
9797
; CHECK-NEXT: [[TMP61:%.*]] = select i1 [[TMP59]], i64 [[TMP60]], i64 [[TMP57]]
9898
; CHECK-NEXT: [[TMP16:%.*]] = add i64 [[INDEX1]], [[TMP61]]
9999
; CHECK-NEXT: [[TMP17:%.*]] = add i64 3, [[TMP16]]

‎llvm/test/Transforms/LoopVectorize/single-early-exit-interleave.ll‎

Lines changed: 24 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -125,15 +125,15 @@ define i64 @same_exit_block_pre_inc_use1() {
125125
; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
126126
; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
127127
; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
128-
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24]], 4
128+
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35]], 4
129129
; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
130130
; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
131131
; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
132-
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28]], 4
132+
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26]], 4
133133
; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
134134
; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
135135
; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
136-
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32]], 4
136+
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30]], 4
137137
; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
138138
; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
139139
; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -223,15 +223,15 @@ define ptr @same_exit_block_pre_inc_use1_ivptr() {
223223
; VF4IC4-NEXT: [[TMP29:%.*]] = add i64 12, [[TMP28]]
224224
; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP16]], i1 true)
225225
; VF4IC4-NEXT: [[TMP19:%.*]] = add i64 8, [[TMP30]]
226-
; VF4IC4-NEXT: [[TMP18:%.*]] = icmp ne i64 [[TMP19]], 4
226+
; VF4IC4-NEXT: [[TMP18:%.*]] = icmp ne i64 [[TMP30]], 4
227227
; VF4IC4-NEXT: [[TMP20:%.*]] = select i1 [[TMP18]], i64 [[TMP19]], i64 [[TMP29]]
228228
; VF4IC4-NEXT: [[TMP21:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP15]], i1 true)
229229
; VF4IC4-NEXT: [[TMP23:%.*]] = add i64 4, [[TMP21]]
230-
; VF4IC4-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP23]], 4
230+
; VF4IC4-NEXT: [[TMP22:%.*]] = icmp ne i64 [[TMP21]], 4
231231
; VF4IC4-NEXT: [[TMP24:%.*]] = select i1 [[TMP22]], i64 [[TMP23]], i64 [[TMP20]]
232232
; VF4IC4-NEXT: [[TMP25:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP2]], i1 true)
233233
; VF4IC4-NEXT: [[TMP27:%.*]] = add i64 0, [[TMP25]]
234-
; VF4IC4-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP27]], 4
234+
; VF4IC4-NEXT: [[TMP26:%.*]] = icmp ne i64 [[TMP25]], 4
235235
; VF4IC4-NEXT: [[TMP6:%.*]] = select i1 [[TMP26]], i64 [[TMP27]], i64 [[TMP24]]
236236
; VF4IC4-NEXT: [[TMP7:%.*]] = add i64 [[INDEX]], [[TMP6]]
237237
; VF4IC4-NEXT: [[TMP8:%.*]] = getelementptr i8, ptr [[P1]], i64 [[TMP7]]
@@ -324,15 +324,15 @@ define i64 @same_exit_block_post_inc_use() {
324324
; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
325325
; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
326326
; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
327-
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24]], 4
327+
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35]], 4
328328
; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
329329
; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
330330
; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
331-
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28]], 4
331+
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26]], 4
332332
; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
333333
; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
334334
; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
335-
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32]], 4
335+
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30]], 4
336336
; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
337337
; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
338338
; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -432,15 +432,15 @@ define i64 @diff_exit_block_pre_inc_use1() {
432432
; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
433433
; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
434434
; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
435-
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24]], 4
435+
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35]], 4
436436
; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
437437
; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
438438
; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
439-
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28]], 4
439+
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26]], 4
440440
; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
441441
; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
442442
; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
443-
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32]], 4
443+
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30]], 4
444444
; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
445445
; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
446446
; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -547,15 +547,15 @@ define i64 @diff_exit_block_post_inc_use1() {
547547
; VF4IC4-NEXT: [[TMP34:%.*]] = add i64 12, [[TMP33]]
548548
; VF4IC4-NEXT: [[TMP35:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
549549
; VF4IC4-NEXT: [[TMP24:%.*]] = add i64 8, [[TMP35]]
550-
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP24]], 4
550+
; VF4IC4-NEXT: [[TMP23:%.*]] = icmp ne i64 [[TMP35]], 4
551551
; VF4IC4-NEXT: [[TMP25:%.*]] = select i1 [[TMP23]], i64 [[TMP24]], i64 [[TMP34]]
552552
; VF4IC4-NEXT: [[TMP26:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
553553
; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 4, [[TMP26]]
554-
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28]], 4
554+
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP26]], 4
555555
; VF4IC4-NEXT: [[TMP29:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP25]]
556556
; VF4IC4-NEXT: [[TMP30:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
557557
; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 0, [[TMP30]]
558-
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32]], 4
558+
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP30]], 4
559559
; VF4IC4-NEXT: [[TMP8:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP29]]
560560
; VF4IC4-NEXT: [[TMP9:%.*]] = add i64 [[INDEX]], [[TMP8]]
561561
; VF4IC4-NEXT: [[TMP10:%.*]] = add i64 3, [[TMP9]]
@@ -678,15 +678,15 @@ define i64 @same_exit_block_pre_inc_use1_reverse() {
678678
; VF4IC4-NEXT: [[TMP42:%.*]] = add i64 12, [[TMP41]]
679679
; VF4IC4-NEXT: [[TMP43:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP20]], i1 true)
680680
; VF4IC4-NEXT: [[TMP32:%.*]] = add i64 8, [[TMP43]]
681-
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP32]], 4
681+
; VF4IC4-NEXT: [[TMP31:%.*]] = icmp ne i64 [[TMP43]], 4
682682
; VF4IC4-NEXT: [[TMP33:%.*]] = select i1 [[TMP31]], i64 [[TMP32]], i64 [[TMP42]]
683683
; VF4IC4-NEXT: [[TMP34:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP19]], i1 true)
684684
; VF4IC4-NEXT: [[TMP36:%.*]] = add i64 4, [[TMP34]]
685-
; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP36]], 4
685+
; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP34]], 4
686686
; VF4IC4-NEXT: [[TMP37:%.*]] = select i1 [[TMP35]], i64 [[TMP36]], i64 [[TMP33]]
687687
; VF4IC4-NEXT: [[TMP38:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP6]], i1 true)
688688
; VF4IC4-NEXT: [[TMP40:%.*]] = add i64 0, [[TMP38]]
689-
; VF4IC4-NEXT: [[TMP39:%.*]] = icmp ne i64 [[TMP40]], 4
689+
; VF4IC4-NEXT: [[TMP39:%.*]] = icmp ne i64 [[TMP38]], 4
690690
; VF4IC4-NEXT: [[TMP10:%.*]] = select i1 [[TMP39]], i64 [[TMP40]], i64 [[TMP37]]
691691
; VF4IC4-NEXT: [[TMP11:%.*]] = add i64 [[INDEX]], [[TMP10]]
692692
; VF4IC4-NEXT: [[TMP12:%.*]] = sub i64 1023, [[TMP11]]
@@ -785,15 +785,15 @@ define i8 @same_exit_block_use_loaded_value() {
785785
; VF4IC4-NEXT: [[TMP20:%.*]] = add i64 12, [[FIRST_ACTIVE_LANE1]]
786786
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE8:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP12]], i1 true)
787787
; VF4IC4-NEXT: [[TMP22:%.*]] = add i64 8, [[FIRST_ACTIVE_LANE8]]
788-
; VF4IC4-NEXT: [[TMP21:%.*]] = icmp ne i64 [[TMP22]], 4
788+
; VF4IC4-NEXT: [[TMP21:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE8]], 4
789789
; VF4IC4-NEXT: [[TMP23:%.*]] = select i1 [[TMP21]], i64 [[TMP22]], i64 [[TMP20]]
790790
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE9:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP11]], i1 true)
791791
; VF4IC4-NEXT: [[TMP25:%.*]] = add i64 4, [[FIRST_ACTIVE_LANE9]]
792-
; VF4IC4-NEXT: [[TMP24:%.*]] = icmp ne i64 [[TMP25]], 4
792+
; VF4IC4-NEXT: [[TMP24:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE9]], 4
793793
; VF4IC4-NEXT: [[TMP26:%.*]] = select i1 [[TMP24]], i64 [[TMP25]], i64 [[TMP23]]
794794
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE10:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP4]], i1 true)
795795
; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 0, [[FIRST_ACTIVE_LANE10]]
796-
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[TMP28]], 4
796+
; VF4IC4-NEXT: [[TMP27:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE10]], 4
797797
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE:%.*]] = select i1 [[TMP27]], i64 [[TMP28]], i64 [[TMP26]]
798798
; VF4IC4-NEXT: [[EARLY_EXIT_VALUE:%.*]] = extractelement <4 x i8> [[WIDE_LOAD]], i64 [[FIRST_ACTIVE_LANE]]
799799
; VF4IC4-NEXT: br label [[LOOP_END]]
@@ -908,15 +908,15 @@ define i8 @same_exit_block_reverse_use_loaded_value() {
908908
; VF4IC4-NEXT: [[TMP28:%.*]] = add i64 12, [[FIRST_ACTIVE_LANE1]]
909909
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE15:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP20]], i1 true)
910910
; VF4IC4-NEXT: [[TMP30:%.*]] = add i64 8, [[FIRST_ACTIVE_LANE15]]
911-
; VF4IC4-NEXT: [[TMP29:%.*]] = icmp ne i64 [[TMP30]], 4
911+
; VF4IC4-NEXT: [[TMP29:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE15]], 4
912912
; VF4IC4-NEXT: [[TMP31:%.*]] = select i1 [[TMP29]], i64 [[TMP30]], i64 [[TMP28]]
913913
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE16:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP19]], i1 true)
914914
; VF4IC4-NEXT: [[TMP33:%.*]] = add i64 4, [[FIRST_ACTIVE_LANE16]]
915-
; VF4IC4-NEXT: [[TMP32:%.*]] = icmp ne i64 [[TMP33]], 4
915+
; VF4IC4-NEXT: [[TMP32:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE16]], 4
916916
; VF4IC4-NEXT: [[TMP34:%.*]] = select i1 [[TMP32]], i64 [[TMP33]], i64 [[TMP31]]
917917
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE17:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v4i1(<4 x i1> [[TMP6]], i1 true)
918918
; VF4IC4-NEXT: [[TMP36:%.*]] = add i64 0, [[FIRST_ACTIVE_LANE17]]
919-
; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[TMP36]], 4
919+
; VF4IC4-NEXT: [[TMP35:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE17]], 4
920920
; VF4IC4-NEXT: [[FIRST_ACTIVE_LANE:%.*]] = select i1 [[TMP35]], i64 [[TMP36]], i64 [[TMP34]]
921921
; VF4IC4-NEXT: [[EARLY_EXIT_VALUE:%.*]] = extractelement <4 x i8> [[REVERSE]], i64 [[FIRST_ACTIVE_LANE]]
922922
; VF4IC4-NEXT: br label [[LOOP_END]]

‎llvm/test/Transforms/LoopVectorize/vector-loop-backedge-elimination-early-exit.ll‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -205,7 +205,7 @@ define i64 @test_early_exit_max_tc_less_than_16_with_iv_used_outside(ptr derefer
205205
; VF8UF2-NEXT: [[TMP10:%.*]] = add i64 8, [[TMP8]]
206206
; VF8UF2-NEXT: [[FIRST_ACTIVE_LANE:%.*]] = call i64 @llvm.experimental.cttz.elts.i64.v8i1(<8 x i1> [[TMP3]], i1 true)
207207
; VF8UF2-NEXT: [[TMP5:%.*]] = add i64 0, [[FIRST_ACTIVE_LANE]]
208-
; VF8UF2-NEXT: [[TMP9:%.*]] = icmp ne i64 [[TMP5]], 8
208+
; VF8UF2-NEXT: [[TMP9:%.*]] = icmp ne i64 [[FIRST_ACTIVE_LANE]], 8
209209
; VF8UF2-NEXT: [[TMP11:%.*]] = select i1 [[TMP9]], i64 [[TMP5]], i64 [[TMP10]]
210210
; VF8UF2-NEXT: [[TMP12:%.*]] = add i64 0, [[TMP11]]
211211
; VF8UF2-NEXT: br label %[[EXIT]]

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