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Use nounwind to avoid touching unrelated tests
1 parent 0311f70 commit e811d05

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‎llvm/test/CodeGen/AMDGPU/GlobalISel/call-outgoing-stack-args.ll‎

Lines changed: 9 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
declare hidden void @external_void_func_v16i32_v16i32_v4i32(<16 x i32>, <16 x i32>, <4 x i32>) #0
1010
declare hidden void @external_void_func_byval(ptr addrspace(5) byval([16 x i32])) #0
1111

12-
define amdgpu_kernel void @kernel_caller_stack() {
12+
define amdgpu_kernel void @kernel_caller_stack() #2 {
1313
; MUBUF-LABEL: kernel_caller_stack:
1414
; MUBUF: ; %bb.0:
1515
; MUBUF-NEXT: s_add_u32 flat_scratch_lo, s12, s17
@@ -57,7 +57,7 @@ define amdgpu_kernel void @kernel_caller_stack() {
5757
ret void
5858
}
5959

60-
define amdgpu_kernel void @kernel_caller_byval() {
60+
define amdgpu_kernel void @kernel_caller_byval() #2 {
6161
; MUBUF-LABEL: kernel_caller_byval:
6262
; MUBUF: ; %bb.0:
6363
; MUBUF-NEXT: s_add_u32 flat_scratch_lo, s12, s17
@@ -213,7 +213,7 @@ define amdgpu_kernel void @kernel_caller_byval() {
213213
ret void
214214
}
215215

216-
define void @func_caller_stack() {
216+
define void @func_caller_stack() #2 {
217217
; MUBUF-LABEL: func_caller_stack:
218218
; MUBUF: ; %bb.0:
219219
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -222,11 +222,11 @@ define void @func_caller_stack() {
222222
; MUBUF-NEXT: s_or_saveexec_b64 s[6:7], -1
223223
; MUBUF-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
224224
; MUBUF-NEXT: s_mov_b64 exec, s[6:7]
225-
; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
226225
; MUBUF-NEXT: s_addk_i32 s32, 0x400
227226
; MUBUF-NEXT: v_mov_b32_e32 v0, 9
228227
; MUBUF-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:4
229228
; MUBUF-NEXT: v_mov_b32_e32 v0, 10
229+
; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
230230
; MUBUF-NEXT: buffer_store_dword v0, off, s[0:3], s32 offset:8
231231
; MUBUF-NEXT: v_mov_b32_e32 v0, 11
232232
; MUBUF-NEXT: v_writelane_b32 v40, s30, 0
@@ -257,8 +257,8 @@ define void @func_caller_stack() {
257257
; FLATSCR-NEXT: s_or_saveexec_b64 s[2:3], -1
258258
; FLATSCR-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
259259
; FLATSCR-NEXT: s_mov_b64 exec, s[2:3]
260-
; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
261260
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
261+
; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
262262
; FLATSCR-NEXT: s_add_u32 s0, s32, 4
263263
; FLATSCR-NEXT: v_mov_b32_e32 v0, 9
264264
; FLATSCR-NEXT: scratch_store_dword off, v0, s0
@@ -291,7 +291,7 @@ define void @func_caller_stack() {
291291
ret void
292292
}
293293

294-
define void @func_caller_byval(ptr addrspace(5) %argptr) {
294+
define void @func_caller_byval(ptr addrspace(5) %argptr) #2 {
295295
; MUBUF-LABEL: func_caller_byval:
296296
; MUBUF: ; %bb.0:
297297
; MUBUF-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -300,10 +300,10 @@ define void @func_caller_byval(ptr addrspace(5) %argptr) {
300300
; MUBUF-NEXT: s_or_saveexec_b64 s[6:7], -1
301301
; MUBUF-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
302302
; MUBUF-NEXT: s_mov_b64 exec, s[6:7]
303-
; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
304303
; MUBUF-NEXT: buffer_load_dword v1, v0, s[0:3], 0 offen
305304
; MUBUF-NEXT: buffer_load_dword v2, v0, s[0:3], 0 offen offset:4
306305
; MUBUF-NEXT: s_addk_i32 s32, 0x400
306+
; MUBUF-NEXT: v_writelane_b32 v40, s4, 2
307307
; MUBUF-NEXT: v_writelane_b32 v40, s30, 0
308308
; MUBUF-NEXT: s_getpc_b64 s[4:5]
309309
; MUBUF-NEXT: s_add_u32 s4, s4, external_void_func_byval@rel32@lo+4
@@ -382,9 +382,9 @@ define void @func_caller_byval(ptr addrspace(5) %argptr) {
382382
; FLATSCR-NEXT: s_or_saveexec_b64 s[2:3], -1
383383
; FLATSCR-NEXT: scratch_store_dword off, v40, s33 ; 4-byte Folded Spill
384384
; FLATSCR-NEXT: s_mov_b64 exec, s[2:3]
385-
; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
386385
; FLATSCR-NEXT: scratch_load_dwordx2 v[1:2], v0, off
387386
; FLATSCR-NEXT: s_add_i32 s32, s32, 16
387+
; FLATSCR-NEXT: v_writelane_b32 v40, s0, 2
388388
; FLATSCR-NEXT: v_writelane_b32 v40, s30, 0
389389
; FLATSCR-NEXT: s_getpc_b64 s[0:1]
390390
; FLATSCR-NEXT: s_add_u32 s0, s0, external_void_func_byval@rel32@lo+4
@@ -432,3 +432,4 @@ declare void @llvm.memset.p5.i32(ptr addrspace(5) nocapture writeonly, i8, i32,
432432

433433
attributes #0 = { nounwind "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-cluster-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-cluster-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-cluster-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" }
434434
attributes #1 = { argmemonly nofree nounwind willreturn writeonly }
435+
attributes #2 = { nounwind }

‎llvm/test/CodeGen/AMDGPU/GlobalISel/dynamic-alloca-uniform.ll‎

Lines changed: 11 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@
55

66
@gv = external addrspace(4) constant i32
77

8-
define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align4(i32 %n) {
8+
define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align4(i32 %n) #0 {
99
; GFX9-LABEL: kernel_dynamic_stackalloc_sgpr_align4:
1010
; GFX9: ; %bb.0:
1111
; GFX9-NEXT: s_load_dword s5, s[8:9], 0x0
@@ -63,7 +63,7 @@ define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align4(i32 %n) {
6363
ret void
6464
}
6565

66-
define void @func_dynamic_stackalloc_sgpr_align4() {
66+
define void @func_dynamic_stackalloc_sgpr_align4() #0 {
6767
; GFX9-LABEL: func_dynamic_stackalloc_sgpr_align4:
6868
; GFX9: ; %bb.0:
6969
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -146,7 +146,7 @@ define void @func_dynamic_stackalloc_sgpr_align4() {
146146
ret void
147147
}
148148

149-
define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align16(i32 %n) {
149+
define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align16(i32 %n) #0 {
150150
; GFX9-LABEL: kernel_dynamic_stackalloc_sgpr_align16:
151151
; GFX9: ; %bb.0:
152152
; GFX9-NEXT: s_load_dword s5, s[8:9], 0x0
@@ -204,7 +204,7 @@ define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align16(i32 %n) {
204204
ret void
205205
}
206206

207-
define void @func_dynamic_stackalloc_sgpr_align16() {
207+
define void @func_dynamic_stackalloc_sgpr_align16() #0 {
208208
; GFX9-LABEL: func_dynamic_stackalloc_sgpr_align16:
209209
; GFX9: ; %bb.0:
210210
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -287,7 +287,7 @@ define void @func_dynamic_stackalloc_sgpr_align16() {
287287
ret void
288288
}
289289

290-
define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align32(i32 %n) {
290+
define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align32(i32 %n) #0 {
291291
; GFX9-LABEL: kernel_dynamic_stackalloc_sgpr_align32:
292292
; GFX9: ; %bb.0:
293293
; GFX9-NEXT: s_load_dword s4, s[8:9], 0x0
@@ -348,7 +348,7 @@ define amdgpu_kernel void @kernel_dynamic_stackalloc_sgpr_align32(i32 %n) {
348348
ret void
349349
}
350350

351-
define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
351+
define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) #0 {
352352
; GFX9-LABEL: func_dynamic_stackalloc_sgpr_align32:
353353
; GFX9: ; %bb.0:
354354
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -363,6 +363,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
363363
; GFX9-NEXT: s_addc_u32 s5, s5, gv@gotpcrel32@hi+12
364364
; GFX9-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
365365
; GFX9-NEXT: v_mov_b32_e32 v0, 0
366+
; GFX9-NEXT: s_mov_b32 s33, s6
366367
; GFX9-NEXT: s_waitcnt lgkmcnt(0)
367368
; GFX9-NEXT: s_load_dword s4, s[4:5], 0x0
368369
; GFX9-NEXT: s_add_u32 s5, s32, 0x7ff
@@ -376,7 +377,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
376377
; GFX9-NEXT: s_add_u32 s32, s5, s4
377378
; GFX9-NEXT: s_mov_b32 s32, s34
378379
; GFX9-NEXT: s_mov_b32 s34, s7
379-
; GFX9-NEXT: s_mov_b32 s33, s6
380380
; GFX9-NEXT: s_waitcnt vmcnt(0)
381381
; GFX9-NEXT: s_setpc_b64 s[30:31]
382382
;
@@ -394,6 +394,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
394394
; GFX10-NEXT: s_addc_u32 s5, s5, gv@gotpcrel32@hi+12
395395
; GFX10-NEXT: v_mov_b32_e32 v0, 0
396396
; GFX10-NEXT: s_load_dwordx2 s[4:5], s[4:5], 0x0
397+
; GFX10-NEXT: s_mov_b32 s33, s6
397398
; GFX10-NEXT: s_waitcnt lgkmcnt(0)
398399
; GFX10-NEXT: s_load_dword s4, s[4:5], 0x0
399400
; GFX10-NEXT: s_add_u32 s5, s32, 0x3ff
@@ -407,7 +408,6 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
407408
; GFX10-NEXT: s_add_u32 s32, s5, s4
408409
; GFX10-NEXT: s_mov_b32 s32, s34
409410
; GFX10-NEXT: s_mov_b32 s34, s7
410-
; GFX10-NEXT: s_mov_b32 s33, s6
411411
; GFX10-NEXT: s_setpc_b64 s[30:31]
412412
;
413413
; GFX11-LABEL: func_dynamic_stackalloc_sgpr_align32:
@@ -424,6 +424,7 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
424424
; GFX11-NEXT: s_addc_u32 s1, s1, gv@gotpcrel32@hi+12
425425
; GFX11-NEXT: v_mov_b32_e32 v0, 0
426426
; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x0
427+
; GFX11-NEXT: s_mov_b32 s33, s2
427428
; GFX11-NEXT: s_waitcnt lgkmcnt(0)
428429
; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x0
429430
; GFX11-NEXT: s_add_u32 s1, s32, 0x3ff
@@ -438,10 +439,11 @@ define void @func_dynamic_stackalloc_sgpr_align32(ptr addrspace(1) %out) {
438439
; GFX11-NEXT: s_add_u32 s32, s1, s0
439440
; GFX11-NEXT: s_mov_b32 s32, s34
440441
; GFX11-NEXT: s_mov_b32 s34, s3
441-
; GFX11-NEXT: s_mov_b32 s33, s2
442442
; GFX11-NEXT: s_setpc_b64 s[30:31]
443443
%n = load i32, ptr addrspace(4) @gv
444444
%alloca = alloca i32, i32 %n, align 32, addrspace(5)
445445
store i32 0, ptr addrspace(5) %alloca
446446
ret void
447447
}
448+
449+
attributes #0 = { nounwind }

‎llvm/test/CodeGen/AMDGPU/GlobalISel/localizer.ll‎

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
; Test the localizer did something and we don't materialize all
55
; constants in SGPRs in the entry block.
66

7-
define amdgpu_kernel void @localize_constants(i1 %cond) {
7+
define amdgpu_kernel void @localize_constants(i1 %cond) #0 {
88
; GFX9-LABEL: localize_constants:
99
; GFX9: ; %bb.0: ; %entry
1010
; GFX9-NEXT: s_load_dword s1, s[8:9], 0x0
@@ -91,7 +91,7 @@ bb2:
9191
@gv2 = addrspace(1) global i32 poison, align 4
9292
@gv3 = addrspace(1) global i32 poison, align 4
9393

94-
define amdgpu_kernel void @localize_globals(i1 %cond) {
94+
define amdgpu_kernel void @localize_globals(i1 %cond) #0 {
9595
; GFX9-LABEL: localize_globals:
9696
; GFX9: ; %bb.0: ; %entry
9797
; GFX9-NEXT: s_load_dword s1, s[8:9], 0x0
@@ -162,7 +162,7 @@ bb2:
162162
@static.gv2 = internal addrspace(1) global i32 poison, align 4
163163
@static.gv3 = internal addrspace(1) global i32 poison, align 4
164164

165-
define void @localize_internal_globals(i1 %cond) {
165+
define void @localize_internal_globals(i1 %cond) #0 {
166166
; GFX9-LABEL: localize_internal_globals:
167167
; GFX9: ; %bb.0: ; %entry
168168
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -226,7 +226,7 @@ bb2:
226226
}
227227

228228
; This would crash from using the wrong insert point
229-
define void @sink_null_insert_pt(ptr addrspace(4) %arg0) {
229+
define void @sink_null_insert_pt(ptr addrspace(4) %arg0) #0 {
230230
; GFX9-LABEL: sink_null_insert_pt:
231231
; GFX9: ; %bb.0: ; %entry
232232
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
@@ -235,11 +235,11 @@ define void @sink_null_insert_pt(ptr addrspace(4) %arg0) {
235235
; GFX9-NEXT: s_or_saveexec_b64 s[18:19], -1
236236
; GFX9-NEXT: buffer_store_dword v40, off, s[0:3], s33 ; 4-byte Folded Spill
237237
; GFX9-NEXT: s_mov_b64 exec, s[18:19]
238-
; GFX9-NEXT: v_writelane_b32 v40, s16, 2
239238
; GFX9-NEXT: v_mov_b32_e32 v0, 0
240239
; GFX9-NEXT: v_mov_b32_e32 v1, 0
241240
; GFX9-NEXT: global_load_dword v0, v[0:1], off glc
242241
; GFX9-NEXT: s_waitcnt vmcnt(0)
242+
; GFX9-NEXT: v_writelane_b32 v40, s16, 2
243243
; GFX9-NEXT: v_writelane_b32 v40, s30, 0
244244
; GFX9-NEXT: s_addk_i32 s32, 0x400
245245
; GFX9-NEXT: v_writelane_b32 v40, s31, 1
@@ -262,3 +262,5 @@ bb1:
262262
call void null()
263263
ret void
264264
}
265+
266+
attributes #0 = { nounwind }

‎llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll‎

Lines changed: 7 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,7 +10,7 @@
1010

1111
; FIXME: FunctionLoweringInfo unhelpfully doesn't preserve an
1212
; alignment less than the stack alignment.
13-
define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) {
13+
define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) #1 {
1414
; GCN-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align4:
1515
; GCN: ; %bb.0: ; %entry
1616
; GCN-NEXT: s_load_dword s4, s[8:9], 0x8
@@ -82,7 +82,7 @@ bb.2:
8282
; ASSUME1024: .amdhsa_private_segment_fixed_size 1040
8383
; ASSUME1024: ; ScratchSize: 1040
8484

85-
define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {
85+
define amdgpu_kernel void @kernel_non_entry_block_static_alloca_uniformly_reached_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) #1 {
8686
; GCN-LABEL: kernel_non_entry_block_static_alloca_uniformly_reached_align64:
8787
; GCN: ; %bb.0: ; %entry
8888
; GCN-NEXT: s_load_dword s4, s[8:9], 0x8
@@ -146,13 +146,13 @@ bb.1:
146146
; ASSUME1024: ; ScratchSize: 1088
147147

148148

149-
define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) {
149+
define void @func_non_entry_block_static_alloca_align4(ptr addrspace(1) %out, i32 %arg.cond0, i32 %arg.cond1, i32 %in) #1 {
150150
; GCN-LABEL: func_non_entry_block_static_alloca_align4:
151151
; GCN: ; %bb.0: ; %entry
152152
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
153153
; GCN-NEXT: s_mov_b32 s7, s33
154-
; GCN-NEXT: s_mov_b32 s33, s32
155154
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
155+
; GCN-NEXT: s_mov_b32 s33, s32
156156
; GCN-NEXT: s_addk_i32 s32, 0x400
157157
; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
158158
; GCN-NEXT: s_cbranch_execz .LBB2_3
@@ -210,16 +210,16 @@ bb.2:
210210
ret void
211211
}
212212

213-
define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) {
213+
define void @func_non_entry_block_static_alloca_align64(ptr addrspace(1) %out, i32 %arg.cond, i32 %in) #1 {
214214
; GCN-LABEL: func_non_entry_block_static_alloca_align64:
215215
; GCN: ; %bb.0: ; %entry
216216
; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
217217
; GCN-NEXT: s_mov_b32 s7, s33
218218
; GCN-NEXT: s_add_i32 s33, s32, 0xfc0
219219
; GCN-NEXT: s_mov_b32 s8, s34
220+
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
220221
; GCN-NEXT: s_and_b32 s33, s33, 0xfffff000
221222
; GCN-NEXT: s_mov_b32 s34, s32
222-
; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v2
223223
; GCN-NEXT: s_addk_i32 s32, 0x2000
224224
; GCN-NEXT: s_and_saveexec_b64 s[4:5], vcc
225225
; GCN-NEXT: s_cbranch_execz .LBB3_2
@@ -272,6 +272,7 @@ bb.1:
272272
declare i32 @llvm.amdgcn.workitem.id.x() #0
273273

274274
attributes #0 = { nounwind readnone speculatable }
275+
attributes #1 = { nounwind }
275276

276277
;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
277278
; ASSUME1024: {{.*}}

‎llvm/test/CodeGen/AMDGPU/agpr-spill-copy.mir‎

Lines changed: 1 addition & 49 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
--- |
55
define amdgpu_kernel void @agpr_spill_copy() #0 { ret void }
66

7-
attributes #0 = { "amdgpu-waves-per-eu"="8,8" }
7+
attributes #0 = { "amdgpu-waves-per-eu"="8,8" nounwind }
88
---
99
name: agpr_spill_copy
1010
tracksRegLiveness: true
@@ -18,54 +18,6 @@ body: |
1818
; GFX942-LABEL: name: agpr_spill_copy
1919
; GFX942: liveins: $agpr30, $agpr31
2020
; GFX942-NEXT: {{ $}}
21-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION escape 0x0f, 0x09, 0x90, 0x40, 0x94, 0x04, 0x36, 0x24, 0x36, 0xe9, 0x02
22-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION llvm_register_pair $pc_reg, $sgpr30, 32, $sgpr31, 32
23-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr0
24-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr1
25-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr2
26-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr3
27-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr4
28-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr5
29-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr6
30-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr7
31-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr8
32-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr9
33-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr10
34-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr11
35-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr12
36-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr13
37-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr14
38-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $vgpr15
39-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr0
40-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr1
41-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr2
42-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr3
43-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr4
44-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr5
45-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr6
46-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr7
47-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr8
48-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr9
49-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr10
50-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr11
51-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr12
52-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr13
53-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr14
54-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr15
55-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr16
56-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr17
57-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr18
58-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr19
59-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr20
60-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr21
61-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr22
62-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr23
63-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr24
64-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr25
65-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr26
66-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr27
67-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr28
68-
; GFX942-NEXT: frame-setup CFI_INSTRUCTION undefined $agpr29
6921
; GFX942-NEXT: renamable $agpr16_agpr17_agpr18_agpr19_agpr20_agpr21_agpr22_agpr23_agpr24_agpr25_agpr26_agpr27 = IMPLICIT_DEF
7022
; GFX942-NEXT: renamable $agpr28_agpr29 = IMPLICIT_DEF
7123
; GFX942-NEXT: renamable $vgpr0_vgpr1_vgpr2_vgpr3_vgpr4_vgpr5_vgpr6_vgpr7_vgpr8_vgpr9_vgpr10_vgpr11_vgpr12_vgpr13_vgpr14_vgpr15 = IMPLICIT_DEF

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