1+ ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
12; RUN: llc < %s -mtriple=mips -relocation-model=static | \
2- ; RUN: FileCheck %s -check-prefix=STATIC-O32
3+ ; RUN: FileCheck %s -check-prefix=STATIC-O32
34; RUN: llc < %s -mtriple=mips -relocation-model=pic | \
4- ; RUN: FileCheck %s -check-prefix=PIC-O32
5+ ; RUN: FileCheck %s -check-prefix=PIC-O32
56; RUN: llc < %s -mtriple=mips64 -relocation-model=pic -mcpu=mips4 | \
67; RUN: FileCheck %s -check-prefix=PIC-N64
78; RUN: llc < %s -mtriple=mips64 -relocation-model=static -mcpu=mips4 | \
1213; RUN: FileCheck %s -check-prefix=STATIC-N64
1314
1415define i32 @main () nounwind readnone {
16+ ; STATIC-O32-LABEL: main:
17+ ; STATIC-O32: # %bb.0: # %entry
18+ ; STATIC-O32-NEXT: addiu $sp, $sp, -8
19+ ; STATIC-O32-NEXT: addiu $1, $zero, 2
20+ ; STATIC-O32-NEXT: sw $1, 4($sp)
21+ ; STATIC-O32-NEXT: lw $2, 4($sp)
22+ ; STATIC-O32-NEXT: sltiu $1, $2, 4
23+ ; STATIC-O32-NEXT: beqz $1, $BB0_6
24+ ; STATIC-O32-NEXT: nop
25+ ; STATIC-O32-NEXT: # %bb.1: # %entry
26+ ; STATIC-O32-NEXT: sll $1, $2, 2
27+ ; STATIC-O32-NEXT: lui $2, %hi($JTI0_0)
28+ ; STATIC-O32-NEXT: addu $1, $1, $2
29+ ; STATIC-O32-NEXT: lw $1, %lo($JTI0_0)($1)
30+ ; STATIC-O32-NEXT: jr $1
31+ ; STATIC-O32-NEXT: nop
32+ ; STATIC-O32-NEXT: $BB0_2: # %bb5
33+ ; STATIC-O32-NEXT: addiu $2, $zero, 1
34+ ; STATIC-O32-NEXT: jr $ra
35+ ; STATIC-O32-NEXT: addiu $sp, $sp, 8
36+ ; STATIC-O32-NEXT: $BB0_3: # %bb2
37+ ; STATIC-O32-NEXT: addiu $2, $zero, 0
38+ ; STATIC-O32-NEXT: jr $ra
39+ ; STATIC-O32-NEXT: addiu $sp, $sp, 8
40+ ; STATIC-O32-NEXT: $BB0_4: # %bb3
41+ ; STATIC-O32-NEXT: addiu $2, $zero, 3
42+ ; STATIC-O32-NEXT: jr $ra
43+ ; STATIC-O32-NEXT: addiu $sp, $sp, 8
44+ ; STATIC-O32-NEXT: $BB0_5: # %bb1
45+ ; STATIC-O32-NEXT: addiu $2, $zero, 2
46+ ; STATIC-O32-NEXT: jr $ra
47+ ; STATIC-O32-NEXT: addiu $sp, $sp, 8
48+ ; STATIC-O32-NEXT: $BB0_6: # %bb4
49+ ; STATIC-O32-NEXT: addiu $2, $zero, 4
50+ ; STATIC-O32-NEXT: jr $ra
51+ ; STATIC-O32-NEXT: addiu $sp, $sp, 8
52+ ;
53+ ; PIC-O32-LABEL: main:
54+ ; PIC-O32: # %bb.0: # %entry
55+ ; PIC-O32-NEXT: lui $2, %hi(_gp_disp)
56+ ; PIC-O32-NEXT: addiu $2, $2, %lo(_gp_disp)
57+ ; PIC-O32-NEXT: addiu $sp, $sp, -8
58+ ; PIC-O32-NEXT: addiu $1, $zero, 2
59+ ; PIC-O32-NEXT: sw $1, 4($sp)
60+ ; PIC-O32-NEXT: lw $3, 4($sp)
61+ ; PIC-O32-NEXT: sltiu $1, $3, 4
62+ ; PIC-O32-NEXT: beqz $1, $BB0_6
63+ ; PIC-O32-NEXT: addu $2, $2, $25
64+ ; PIC-O32-NEXT: # %bb.1: # %entry
65+ ; PIC-O32-NEXT: sll $1, $3, 2
66+ ; PIC-O32-NEXT: lw $3, %got($JTI0_0)($2)
67+ ; PIC-O32-NEXT: addu $1, $1, $3
68+ ; PIC-O32-NEXT: lw $1, %lo($JTI0_0)($1)
69+ ; PIC-O32-NEXT: addu $1, $1, $2
70+ ; PIC-O32-NEXT: jr $1
71+ ; PIC-O32-NEXT: nop
72+ ; PIC-O32-NEXT: $BB0_2: # %bb5
73+ ; PIC-O32-NEXT: addiu $2, $zero, 1
74+ ; PIC-O32-NEXT: jr $ra
75+ ; PIC-O32-NEXT: addiu $sp, $sp, 8
76+ ; PIC-O32-NEXT: $BB0_3: # %bb2
77+ ; PIC-O32-NEXT: addiu $2, $zero, 0
78+ ; PIC-O32-NEXT: jr $ra
79+ ; PIC-O32-NEXT: addiu $sp, $sp, 8
80+ ; PIC-O32-NEXT: $BB0_4: # %bb3
81+ ; PIC-O32-NEXT: addiu $2, $zero, 3
82+ ; PIC-O32-NEXT: jr $ra
83+ ; PIC-O32-NEXT: addiu $sp, $sp, 8
84+ ; PIC-O32-NEXT: $BB0_5: # %bb1
85+ ; PIC-O32-NEXT: addiu $2, $zero, 2
86+ ; PIC-O32-NEXT: jr $ra
87+ ; PIC-O32-NEXT: addiu $sp, $sp, 8
88+ ; PIC-O32-NEXT: $BB0_6: # %bb4
89+ ; PIC-O32-NEXT: addiu $2, $zero, 4
90+ ; PIC-O32-NEXT: jr $ra
91+ ; PIC-O32-NEXT: addiu $sp, $sp, 8
92+ ;
93+ ; PIC-N64-LABEL: main:
94+ ; PIC-N64: # %bb.0: # %entry
95+ ; PIC-N64-NEXT: daddiu $sp, $sp, -16
96+ ; PIC-N64-NEXT: lui $1, %hi(%neg(%gp_rel(main)))
97+ ; PIC-N64-NEXT: daddu $2, $1, $25
98+ ; PIC-N64-NEXT: addiu $1, $zero, 2
99+ ; PIC-N64-NEXT: sw $1, 12($sp)
100+ ; PIC-N64-NEXT: lw $1, 12($sp)
101+ ; PIC-N64-NEXT: sltiu $4, $1, 4
102+ ; PIC-N64-NEXT: dsll $3, $1, 32
103+ ; PIC-N64-NEXT: beqz $4, .LBB0_6
104+ ; PIC-N64-NEXT: nop
105+ ; PIC-N64-NEXT: # %bb.1: # %entry
106+ ; PIC-N64-NEXT: daddiu $1, $2, %lo(%neg(%gp_rel(main)))
107+ ; PIC-N64-NEXT: dsrl $2, $3, 32
108+ ; PIC-N64-NEXT: dsll $2, $2, 3
109+ ; PIC-N64-NEXT: ld $3, %got_page(.LJTI0_0)($1)
110+ ; PIC-N64-NEXT: daddu $2, $2, $3
111+ ; PIC-N64-NEXT: ld $2, %got_ofst(.LJTI0_0)($2)
112+ ; PIC-N64-NEXT: daddu $1, $2, $1
113+ ; PIC-N64-NEXT: jr $1
114+ ; PIC-N64-NEXT: nop
115+ ; PIC-N64-NEXT: .LBB0_2: # %bb5
116+ ; PIC-N64-NEXT: addiu $2, $zero, 1
117+ ; PIC-N64-NEXT: jr $ra
118+ ; PIC-N64-NEXT: daddiu $sp, $sp, 16
119+ ; PIC-N64-NEXT: .LBB0_3: # %bb2
120+ ; PIC-N64-NEXT: addiu $2, $zero, 0
121+ ; PIC-N64-NEXT: jr $ra
122+ ; PIC-N64-NEXT: daddiu $sp, $sp, 16
123+ ; PIC-N64-NEXT: .LBB0_4: # %bb3
124+ ; PIC-N64-NEXT: addiu $2, $zero, 3
125+ ; PIC-N64-NEXT: jr $ra
126+ ; PIC-N64-NEXT: daddiu $sp, $sp, 16
127+ ; PIC-N64-NEXT: .LBB0_5: # %bb1
128+ ; PIC-N64-NEXT: addiu $2, $zero, 2
129+ ; PIC-N64-NEXT: jr $ra
130+ ; PIC-N64-NEXT: daddiu $sp, $sp, 16
131+ ; PIC-N64-NEXT: .LBB0_6: # %bb4
132+ ; PIC-N64-NEXT: addiu $2, $zero, 4
133+ ; PIC-N64-NEXT: jr $ra
134+ ; PIC-N64-NEXT: daddiu $sp, $sp, 16
135+ ;
136+ ; STATIC-N64-LABEL: main:
137+ ; STATIC-N64: # %bb.0: # %entry
138+ ; STATIC-N64-NEXT: daddiu $sp, $sp, -16
139+ ; STATIC-N64-NEXT: addiu $1, $zero, 2
140+ ; STATIC-N64-NEXT: sw $1, 12($sp)
141+ ; STATIC-N64-NEXT: lw $1, 12($sp)
142+ ; STATIC-N64-NEXT: sltiu $3, $1, 4
143+ ; STATIC-N64-NEXT: dsll $2, $1, 32
144+ ; STATIC-N64-NEXT: beqz $3, .LBB0_6
145+ ; STATIC-N64-NEXT: nop
146+ ; STATIC-N64-NEXT: # %bb.1: # %entry
147+ ; STATIC-N64-NEXT: dsrl $1, $2, 32
148+ ; STATIC-N64-NEXT: dsll $1, $1, 3
149+ ; STATIC-N64-NEXT: lui $2, %highest(.LJTI0_0)
150+ ; STATIC-N64-NEXT: daddiu $2, $2, %higher(.LJTI0_0)
151+ ; STATIC-N64-NEXT: dsll $2, $2, 16
152+ ; STATIC-N64-NEXT: daddiu $2, $2, %hi(.LJTI0_0)
153+ ; STATIC-N64-NEXT: dsll $2, $2, 16
154+ ; STATIC-N64-NEXT: daddu $1, $1, $2
155+ ; STATIC-N64-NEXT: ld $1, %lo(.LJTI0_0)($1)
156+ ; STATIC-N64-NEXT: jr $1
157+ ; STATIC-N64-NEXT: nop
158+ ; STATIC-N64-NEXT: .LBB0_2: # %bb5
159+ ; STATIC-N64-NEXT: addiu $2, $zero, 1
160+ ; STATIC-N64-NEXT: jr $ra
161+ ; STATIC-N64-NEXT: daddiu $sp, $sp, 16
162+ ; STATIC-N64-NEXT: .LBB0_3: # %bb2
163+ ; STATIC-N64-NEXT: addiu $2, $zero, 0
164+ ; STATIC-N64-NEXT: jr $ra
165+ ; STATIC-N64-NEXT: daddiu $sp, $sp, 16
166+ ; STATIC-N64-NEXT: .LBB0_4: # %bb3
167+ ; STATIC-N64-NEXT: addiu $2, $zero, 3
168+ ; STATIC-N64-NEXT: jr $ra
169+ ; STATIC-N64-NEXT: daddiu $sp, $sp, 16
170+ ; STATIC-N64-NEXT: .LBB0_5: # %bb1
171+ ; STATIC-N64-NEXT: addiu $2, $zero, 2
172+ ; STATIC-N64-NEXT: jr $ra
173+ ; STATIC-N64-NEXT: daddiu $sp, $sp, 16
174+ ; STATIC-N64-NEXT: .LBB0_6: # %bb4
175+ ; STATIC-N64-NEXT: addiu $2, $zero, 4
176+ ; STATIC-N64-NEXT: jr $ra
177+ ; STATIC-N64-NEXT: daddiu $sp, $sp, 16
15178entry:
16179 %x = alloca i32 , align 4 ; <ptr> [#uses=2]
17180 store volatile i32 2 , ptr %x , align 4
18181 %0 = load volatile i32 , ptr %x , align 4 ; <i32> [#uses=1]
19- ; STATIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
20- ; STATIC-O32: lui $[[R1:[0-9]+]], %hi($JTI0_0)
21- ; STATIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
22- ; STATIC-O32: lw $[[R3:[0-9]+]], %lo($JTI0_0)($[[R2]])
23182
24- ; PIC-O32: sll $[[R0:[0-9]+]], ${{[0-9]+}}, 2
25- ; PIC-O32: lw $[[R1:[0-9]+]], %got($JTI0_0)
26- ; PIC-O32: addu $[[R2:[0-9]+]], $[[R0]], $[[R1]]
27- ; PIC-O32: lw $[[R4:[0-9]+]], %lo($JTI0_0)($[[R2]])
28- ; PIC-O32: addu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
29- ; PIC-O32: jr $[[R5]]
30183
31- ; STATIC-N64: dsrl $[[I32:[0-9]]], ${{[0-9]+}}, 32
32- ; STATIC-N64: dsll $[[R0:[0-9]]], $[[I32]], 3
33- ; STATIC-N64: lui $[[R1:[0-9]]], %highest(.LJTI0_0)
34- ; STATIC-N64: daddiu $[[R2:[0-9]]], $[[R1]], %higher(.LJTI0_0)
35- ; STATIC-N64: dsll $[[R3:[0-9]]], $[[R2]], 16
36- ; STATIC-N64: daddiu $[[R4:[0-9]]], $[[R3]], %hi(.LJTI0_0)
37- ; STATIC-N64: dsll $[[R5:[0-9]]], $[[R4]], 16
38- ; STATIC-N64: daddu $[[R6:[0-9]]], $[[R0]], $[[R4]]
39- ; STATIC-N64: ld ${{[0-9]+}}, %lo(.LJTI0_0)($[[R6]])
40184
41- ; PIC-N64: dsll $[[R0:[0-9]+]], ${{[0-9]+}}, 32
42- ; PIC-N64: ld $[[R1:[0-9]+]], %got_page(.LJTI0_0)
43- ; PIC-N64: daddu $[[R2:[0-9]+]], $[[R0:[0-9]+]], $[[R1]]
44- ; PIC-N64: ld $[[R4:[0-9]+]], %got_ofst(.LJTI0_0)($[[R2]])
45- ; PIC-N64: daddu $[[R5:[0-9]+]], $[[R4:[0-9]+]]
46- ; PIC-N64: jr $[[R5]]
47185 switch i32 %0 , label %bb4 [
48186 i32 0 , label %bb5
49187 i32 1 , label %bb1
@@ -66,6 +204,7 @@ bb4: ; preds = %entry
66204bb5: ; preds = %entry
67205 ret i32 1
68206}
207+ ; UTC_ARGS: --disable
69208
70209; STATIC-O32: .p2align 2
71210; STATIC-O32: $JTI0_0:
@@ -85,7 +224,7 @@ bb5: ; preds = %entry
85224; STATIC-N64: .8byte
86225; STATIC-N64: .8byte
87226; STATIC-N64: .8byte
88- ;; PIC-N64: .p2align 3
227+ ; PIC-N64: .p2align 3
89228; PIC-N64: .LJTI0_0:
90229; PIC-N64: .gpdword
91230; PIC-N64: .gpdword
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