_mm512_maskz_cvtepu16_epi32

moorabbit · moorabbit · commit e9192531eca7 · 2025-09-14T17:47:53.000-04:00
diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h
@@ -4687,9 +4687,8 @@ _mm512_mask_cvtepu16_epi32(__m512i __W, __mmask16 __U, __m256i __A) {
                                             (__v16si)__W);
 }
 
-static __inline__ __m512i __DEFAULT_FN_ATTRS512
-_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A)
-{
+static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR
+_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) {
   return (__m512i)__builtin_ia32_selectd_512((__mmask16)__U,
                                             (__v16si)_mm512_cvtepu16_epi32(__A),
                                             (__v16si)_mm512_setzero_si512());
diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c
@@ -4132,6 +4132,8 @@ __m512i test_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) {
   return _mm512_maskz_cvtepu16_epi32(__U, __A); 
 }
 
+TEST_CONSTEXPR(match_v16si(_mm512_maskz_cvtepu16_epi32(/*1001 0110 1010 0010=*/0x96a2, (__m256i)(__v16hu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), 0, 2, 0, 0, 0, 6, 0, 8, 0, 10, 11, 0, 13, 0, 0, 16));
+
 __m512i test_mm512_cvtepu16_epi64(__m128i __A) {
   // CHECK-LABEL: test_mm512_cvtepu16_epi64
   // CHECK: zext <8 x i16> %{{.*}} to <8 x i64>

Original file line number	Diff line number	Diff line change
`@@ -4132,6 +4132,8 @@ __m512i test_mm512_maskz_cvtepu16_epi32(__mmask16 __U, __m256i __A) {`
`4132`	`4132`	`return _mm512_maskz_cvtepu16_epi32(__U, __A);`
`4133`	`4133`	`}`
`4134`	`4134`
	`4135`	`+TEST_CONSTEXPR(match_v16si(_mm512_maskz_cvtepu16_epi32(/1001 0110 1010 0010=/0x96a2, (__m256i)(__v16hu){1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16}), 0, 2, 0, 0, 0, 6, 0, 8, 0, 10, 11, 0, 13, 0, 0, 16));`
	`4136`	`+`
`4135`	`4137`	`__m512i test_mm512_cvtepu16_epi64(__m128i __A) {`
`4136`	`4138`	`// CHECK-LABEL: test_mm512_cvtepu16_epi64`
`4137`	`4139`	`// CHECK: zext <8 x i16> %{{.*}} to <8 x i64>`