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[AArch64] Add Tests for CSEL with Common Subexpression after Reassociation; NFC
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‎llvm/test/CodeGen/AArch64/csel-cmp-cse.ll‎

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; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5
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; RUN: llc -mtriple=aarch64-unknown-unknown < %s | FileCheck %s
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declare void @use_i1(i1 %x)
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declare void @use_i32(i32 %x)
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; Based on the IR generated for the `last` method of the type `slice` in Rust
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define ptr @test_last_elem_from_ptr(ptr noundef readnone %x0, i64 noundef %x1) {
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; CHECK-LABEL: test_last_elem_from_ptr:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add x8, x0, x1
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; CHECK-NEXT: cmp x1, #0
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; CHECK-NEXT: sub x8, x8, #1
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; CHECK-NEXT: csel x0, xzr, x8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i64 %x1, 0
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%add.ptr = getelementptr inbounds nuw i8, ptr %x0, i64 %x1
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%add.ptr1 = getelementptr inbounds i8, ptr %add.ptr, i64 -1
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%retval.0 = select i1 %cmp, ptr null, ptr %add.ptr1
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ret ptr %retval.0
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}
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define i32 @test_eq0_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq0_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add nuw i32 %x0, %x1
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_ule7_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ule7_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #8
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; CHECK-NEXT: sub w8, w8, #8
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; CHECK-NEXT: csel w0, wzr, w8, lo
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; CHECK-NEXT: ret
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%cmp = icmp ule i32 %x1, 7
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 8
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_ule0_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ule0_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp ule i32 %x1, 0
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_ultminus2_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ultminus2_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmn w1, #2
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; CHECK-NEXT: add w8, w8, #2
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; CHECK-NEXT: csel w0, wzr, w8, lo
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; CHECK-NEXT: ret
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%cmp = icmp ult i32 %x1, -2
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, -2
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_ne0_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ne0_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, w8, wzr, ne
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; CHECK-NEXT: ret
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%cmp = icmp ne i32 %x1, 0
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 %sub, i32 0
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ret i32 %ret
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}
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define i32 @test_ugt7_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ugt7_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #7
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; CHECK-NEXT: sub w8, w8, #8
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; CHECK-NEXT: csel w0, wzr, w8, hi
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; CHECK-NEXT: ret
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%cmp = icmp ugt i32 %x1, 7
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 8
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_eq0_sub_addcomm_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq0_sub_addcomm_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w1, w0
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add i32 %x1, %x0
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_eq0_subcomm_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq0_subcomm_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add i32 %x0, %x1
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%sub = add i32 -1, %add
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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define i32 @test_eq0_multi_use_sub_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq0_multi_use_sub_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: mov w19, w1
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; CHECK-NEXT: sub w20, w8, #1
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; CHECK-NEXT: mov w0, w20
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; CHECK-NEXT: bl use_i32
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; CHECK-NEXT: cmp w19, #0
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; CHECK-NEXT: csel w0, wzr, w20, eq
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add nuw i32 %x0, %x1
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%sub = sub i32 %add, 1
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tail call void @use_i32(i32 %sub)
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_eq0_multi_use_cmp_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq0_multi_use_cmp_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: stp x30, x19, [sp, #-16]! // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 16
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w30, -16
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: cset w0, eq
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; CHECK-NEXT: csel w19, wzr, w8, eq
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; CHECK-NEXT: bl use_i1
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; CHECK-NEXT: mov w0, w19
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; CHECK-NEXT: ldp x30, x19, [sp], #16 // 16-byte Folded Reload
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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tail call void @use_i1(i1 %cmp)
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%add = add nuw i32 %x0, %x1
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_eq0_multi_use_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq0_multi_use_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: str x30, [sp, #-32]! // 8-byte Folded Spill
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; CHECK-NEXT: stp x20, x19, [sp, #16] // 16-byte Folded Spill
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; CHECK-NEXT: .cfi_def_cfa_offset 32
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; CHECK-NEXT: .cfi_offset w19, -8
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; CHECK-NEXT: .cfi_offset w20, -16
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; CHECK-NEXT: .cfi_offset w30, -32
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; CHECK-NEXT: add w20, w0, w1
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; CHECK-NEXT: mov w19, w1
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; CHECK-NEXT: mov w0, w20
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; CHECK-NEXT: bl use_i32
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; CHECK-NEXT: sub w8, w20, #1
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; CHECK-NEXT: cmp w19, #0
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; CHECK-NEXT: ldp x20, x19, [sp, #16] // 16-byte Folded Reload
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ldr x30, [sp], #32 // 8-byte Folded Reload
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add nuw i32 %x0, %x1
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tail call void @use_i32(i32 %add)
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_eq1_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq1_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #1
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; CHECK-NEXT: sub w8, w8, #2
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 1
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 2
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_ultminus1_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ultminus1_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmn w1, #1
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; CHECK-NEXT: csinc w0, wzr, w8, ne
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; CHECK-NEXT: ret
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%cmp = icmp ult i32 %x1, -1
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, -1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_ugtsmax_sub_add_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ugtsmax_sub_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: mov w8, #-2147483648 // =0x80000000
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; CHECK-NEXT: add w9, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: add w8, w9, w8
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; CHECK-NEXT: csel w0, wzr, w8, lt
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; CHECK-NEXT: ret
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%cmp = icmp ugt i32 %x1, 2147483647
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 2147483648
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_ult_nonconst_i32(i32 %x0, i32 %x1, i32 %x2) {
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; CHECK-LABEL: test_ult_nonconst_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, w2
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; CHECK-NEXT: sub w8, w8, w2
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; CHECK-NEXT: csel w0, wzr, w8, lo
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; CHECK-NEXT: ret
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%cmp = icmp ult i32 %x1, %x2
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, %x2
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_sle7_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_sle7_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #8
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; CHECK-NEXT: sub w8, w8, #8
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; CHECK-NEXT: csel w0, wzr, w8, lt
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; CHECK-NEXT: ret
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%cmp = icmp sle i32 %x1, 7
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 8
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_eq_const_mismatch_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_eq_const_mismatch_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #2
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 2
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_ne_const_mismatch_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ne_const_mismatch_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #2
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; CHECK-NEXT: csel w0, w8, wzr, ne
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; CHECK-NEXT: ret
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%cmp = icmp ne i32 %x1, 0
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 2
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%ret = select i1 %cmp, i32 %sub, i32 0
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ret i32 %ret
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}
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; Negative test
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define i32 @test_ule7_const_mismatch_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ule7_const_mismatch_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #8
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; CHECK-NEXT: sub w8, w8, #7
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; CHECK-NEXT: csel w0, wzr, w8, lo
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; CHECK-NEXT: ret
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%cmp = icmp ule i32 %x1, 7
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 7
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_ugt7_const_mismatch_i32(i32 %x0, i32 %x1) {
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; CHECK-LABEL: test_ugt7_const_mismatch_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: cmp w1, #7
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; CHECK-NEXT: sub w8, w8, #7
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; CHECK-NEXT: csel w0, wzr, w8, hi
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; CHECK-NEXT: ret
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%cmp = icmp ugt i32 %x1, 7
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%add = add i32 %x0, %x1
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%sub = sub i32 %add, 7
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i32 @test_unrelated_add_i32(i32 %x0, i32 %x1, i32 %x2) {
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; CHECK-LABEL: test_unrelated_add_i32:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w2
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; CHECK-NEXT: cmp w1, #0
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i32 %x1, 0
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%add = add nuw i32 %x0, %x2
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%sub = sub i32 %add, 1
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%ret = select i1 %cmp, i32 0, i32 %sub
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ret i32 %ret
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}
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; Negative test
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define i16 @test_eq0_sub_add_i16(i16 %x0, i16 %x1) {
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; CHECK-LABEL: test_eq0_sub_add_i16:
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; CHECK: // %bb.0:
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; CHECK-NEXT: add w8, w0, w1
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; CHECK-NEXT: tst w1, #0xffff
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; CHECK-NEXT: sub w8, w8, #1
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; CHECK-NEXT: csel w0, wzr, w8, eq
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; CHECK-NEXT: ret
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%cmp = icmp eq i16 %x1, 0
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%add = add nuw i16 %x0, %x1
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%sub = sub i16 %add, 1
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%ret = select i1 %cmp, i16 0, i16 %sub
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ret i16 %ret
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}

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