Skip to content

Commit e92b7e9

Browse files
nikicnikic
authored
[CodeGen] Provide original IR type to CC lowering (NFC) (#152709)
It is common to have ABI requirements for illegal types: For example, two i64 argument parts that originally came from an fp128 argument may have a different call ABI than ones that came from a i128 argument. The current calling convention lowering does not provide access to this information, so backends come up with various hacks to support it (like additional pre-analysis cached in CCState, or bypassing the default logic entirely). This PR adds the original IR type to InputArg/OutputArg and passes it down to CCAssignFn. It is not actually used anywhere yet, this just does the mechanical changes to thread through the new argument.
1 parent 6ca6d45 commit e92b7e9

28 files changed

+159
-105
lines changed

‎llvm/include/llvm/CodeGen/CallingConvLower.h

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -154,9 +154,9 @@ struct ForwardedRegister {
154154

155155
/// CCAssignFn - This function assigns a location for Val, updating State to
156156
/// reflect the change. It returns 'true' if it failed to handle Val.
157-
typedef bool CCAssignFn(unsigned ValNo, MVT ValVT,
158-
MVT LocVT, CCValAssign::LocInfo LocInfo,
159-
ISD::ArgFlagsTy ArgFlags, CCState &State);
157+
typedef bool CCAssignFn(unsigned ValNo, MVT ValVT, MVT LocVT,
158+
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
159+
Type *OrigTy, CCState &State);
160160

161161
/// CCCustomFn - This function assigns a location for Val, possibly updating
162162
/// all args to reflect changes and indicates if it handled it. It must set
@@ -290,6 +290,7 @@ class CCState {
290290
/// and argument flags.
291291
LLVM_ABI void AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
292292
SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
293+
SmallVectorImpl<Type *> &OrigTys,
293294
CCAssignFn Fn);
294295

295296
/// The function will invoke AnalyzeCallOperands.
@@ -310,7 +311,7 @@ class CCState {
310311

311312
/// AnalyzeCallResult - Same as above except it's specialized for calls which
312313
/// produce a single value.
313-
LLVM_ABI void AnalyzeCallResult(MVT VT, CCAssignFn Fn);
314+
LLVM_ABI void AnalyzeCallResult(MVT VT, Type *OrigTy, CCAssignFn Fn);
314315

315316
/// getFirstUnallocated - Return the index of the first unallocated register
316317
/// in the set, or Regs.size() if they are all allocated.

‎llvm/include/llvm/CodeGen/GlobalISel/CallLowering.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -198,7 +198,7 @@ class LLVM_ABI CallLowering {
198198
CCValAssign::LocInfo LocInfo, const ArgInfo &Info,
199199
ISD::ArgFlagsTy Flags, CCState &State) {
200200
if (getAssignFn(State.isVarArg())(ValNo, ValVT, LocVT, LocInfo, Flags,
201-
State))
201+
Info.Ty, State))
202202
return true;
203203
StackSize = State.getStackSize();
204204
return false;

‎llvm/include/llvm/CodeGen/TargetCallingConv.h

Lines changed: 9 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -205,6 +205,7 @@ namespace ISD {
205205
ArgFlagsTy Flags;
206206
MVT VT = MVT::Other;
207207
EVT ArgVT;
208+
Type *OrigTy = nullptr;
208209
bool Used = false;
209210

210211
/// Index original Function's argument.
@@ -218,9 +219,10 @@ namespace ISD {
218219
unsigned PartOffset;
219220

220221
InputArg() = default;
221-
InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, bool used,
222+
InputArg(ArgFlagsTy flags, EVT vt, EVT argvt, Type *OrigTy, bool used,
222223
unsigned origIdx, unsigned partOffs)
223-
: Flags(flags), Used(used), OrigArgIndex(origIdx), PartOffset(partOffs) {
224+
: Flags(flags), OrigTy(OrigTy), Used(used), OrigArgIndex(origIdx),
225+
PartOffset(partOffs) {
224226
VT = vt.getSimpleVT();
225227
ArgVT = argvt;
226228
}
@@ -243,6 +245,7 @@ namespace ISD {
243245
ArgFlagsTy Flags;
244246
MVT VT;
245247
EVT ArgVT;
248+
Type *OrigTy = nullptr;
246249

247250
/// Index original Function's argument.
248251
unsigned OrigArgIndex;
@@ -253,9 +256,10 @@ namespace ISD {
253256
unsigned PartOffset;
254257

255258
OutputArg() = default;
256-
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, unsigned origIdx,
257-
unsigned partOffs)
258-
: Flags(flags), OrigArgIndex(origIdx), PartOffset(partOffs) {
259+
OutputArg(ArgFlagsTy flags, MVT vt, EVT argvt, Type *OrigTy,
260+
unsigned origIdx, unsigned partOffs)
261+
: Flags(flags), OrigTy(OrigTy), OrigArgIndex(origIdx),
262+
PartOffset(partOffs) {
259263
VT = vt;
260264
ArgVT = argvt;
261265
}

‎llvm/lib/CodeGen/CallingConvLower.cpp

Lines changed: 12 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -89,7 +89,7 @@ CCState::AnalyzeFormalArguments(const SmallVectorImpl<ISD::InputArg> &Ins,
8989
for (unsigned i = 0; i != NumArgs; ++i) {
9090
MVT ArgVT = Ins[i].VT;
9191
ISD::ArgFlagsTy ArgFlags = Ins[i].Flags;
92-
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this))
92+
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, Ins[i].OrigTy, *this))
9393
report_fatal_error("unable to allocate function argument #" + Twine(i));
9494
}
9595
}
@@ -102,7 +102,7 @@ bool CCState::CheckReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
102102
for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
103103
MVT VT = Outs[i].VT;
104104
ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
105-
if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
105+
if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, Outs[i].OrigTy, *this))
106106
return false;
107107
}
108108
return true;
@@ -116,7 +116,7 @@ void CCState::AnalyzeReturn(const SmallVectorImpl<ISD::OutputArg> &Outs,
116116
for (unsigned i = 0, e = Outs.size(); i != e; ++i) {
117117
MVT VT = Outs[i].VT;
118118
ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
119-
if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this))
119+
if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, Outs[i].OrigTy, *this))
120120
report_fatal_error("unable to allocate function return #" + Twine(i));
121121
}
122122
}
@@ -129,7 +129,8 @@ void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
129129
for (unsigned i = 0; i != NumOps; ++i) {
130130
MVT ArgVT = Outs[i].VT;
131131
ISD::ArgFlagsTy ArgFlags = Outs[i].Flags;
132-
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
132+
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, Outs[i].OrigTy,
133+
*this)) {
133134
#ifndef NDEBUG
134135
dbgs() << "Call operand #" << i << " has unhandled type "
135136
<< ArgVT << '\n';
@@ -142,12 +143,13 @@ void CCState::AnalyzeCallOperands(const SmallVectorImpl<ISD::OutputArg> &Outs,
142143
/// Same as above except it takes vectors of types and argument flags.
143144
void CCState::AnalyzeCallOperands(SmallVectorImpl<MVT> &ArgVTs,
144145
SmallVectorImpl<ISD::ArgFlagsTy> &Flags,
146+
SmallVectorImpl<Type *> &OrigTys,
145147
CCAssignFn Fn) {
146148
unsigned NumOps = ArgVTs.size();
147149
for (unsigned i = 0; i != NumOps; ++i) {
148150
MVT ArgVT = ArgVTs[i];
149151
ISD::ArgFlagsTy ArgFlags = Flags[i];
150-
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) {
152+
if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, OrigTys[i], *this)) {
151153
#ifndef NDEBUG
152154
dbgs() << "Call operand #" << i << " has unhandled type "
153155
<< ArgVT << '\n';
@@ -164,7 +166,7 @@ void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
164166
for (unsigned i = 0, e = Ins.size(); i != e; ++i) {
165167
MVT VT = Ins[i].VT;
166168
ISD::ArgFlagsTy Flags = Ins[i].Flags;
167-
if (Fn(i, VT, VT, CCValAssign::Full, Flags, *this)) {
169+
if (Fn(i, VT, VT, CCValAssign::Full, Flags, Ins[i].OrigTy, *this)) {
168170
#ifndef NDEBUG
169171
dbgs() << "Call result #" << i << " has unhandled type "
170172
<< VT << '\n';
@@ -175,8 +177,8 @@ void CCState::AnalyzeCallResult(const SmallVectorImpl<ISD::InputArg> &Ins,
175177
}
176178

177179
/// Same as above except it's specialized for calls that produce a single value.
178-
void CCState::AnalyzeCallResult(MVT VT, CCAssignFn Fn) {
179-
if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), *this)) {
180+
void CCState::AnalyzeCallResult(MVT VT, Type *OrigTy, CCAssignFn Fn) {
181+
if (Fn(0, VT, VT, CCValAssign::Full, ISD::ArgFlagsTy(), OrigTy, *this)) {
180182
#ifndef NDEBUG
181183
dbgs() << "Call result has unhandled type "
182184
<< VT << '\n';
@@ -213,7 +215,8 @@ void CCState::getRemainingRegParmsForType(SmallVectorImpl<MCRegister> &Regs,
213215
// location in memory.
214216
bool HaveRegParm;
215217
do {
216-
if (Fn(0, VT, VT, CCValAssign::Full, Flags, *this)) {
218+
Type *OrigTy = EVT(VT).getTypeForEVT(Context);
219+
if (Fn(0, VT, VT, CCValAssign::Full, Flags, OrigTy, *this)) {
217220
#ifndef NDEBUG
218221
dbgs() << "Call has unhandled type " << VT
219222
<< " while computing remaining regparms\n";

‎llvm/lib/CodeGen/GlobalISel/CallLowering.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1099,7 +1099,7 @@ bool CallLowering::checkReturn(CCState &CCInfo,
10991099
CCAssignFn *Fn) const {
11001100
for (unsigned I = 0, E = Outs.size(); I < E; ++I) {
11011101
MVT VT = MVT::getVT(Outs[I].Ty);
1102-
if (Fn(I, VT, VT, CCValAssign::Full, Outs[I].Flags[0], CCInfo))
1102+
if (Fn(I, VT, VT, CCValAssign::Full, Outs[I].Flags[0], Outs[I].Ty, CCInfo))
11031103
return false;
11041104
}
11051105
return true;

‎llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -2273,8 +2273,9 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
22732273
Flags.setNoExt();
22742274

22752275
for (unsigned i = 0; i < NumParts; ++i) {
2276-
Outs.push_back(ISD::OutputArg(
2277-
Flags, Parts[i].getValueType().getSimpleVT(), VT, 0, 0));
2276+
Outs.push_back(ISD::OutputArg(Flags,
2277+
Parts[i].getValueType().getSimpleVT(),
2278+
VT, I.getOperand(0)->getType(), 0, 0));
22782279
OutVals.push_back(Parts[i]);
22792280
}
22802281
}
@@ -2292,6 +2293,7 @@ void SelectionDAGBuilder::visitRet(const ReturnInst &I) {
22922293
Flags.setSwiftError();
22932294
Outs.push_back(ISD::OutputArg(Flags, /*vt=*/TLI.getPointerTy(DL),
22942295
/*argvt=*/EVT(TLI.getPointerTy(DL)),
2296+
PointerType::getUnqual(*DAG.getContext()),
22952297
/*origidx=*/1, /*partOffs=*/0));
22962298
// Create SDNode for the swifterror virtual register.
22972299
OutVals.push_back(
@@ -11252,7 +11254,7 @@ TargetLowering::LowerCallTo(TargetLowering::CallLoweringInfo &CLI) const {
1125211254
// For scalable vectors the scalable part is currently handled
1125311255
// by individual targets, so we just use the known minimum size here.
1125411256
ISD::OutputArg MyFlags(
11255-
Flags, Parts[j].getValueType().getSimpleVT(), VT, i,
11257+
Flags, Parts[j].getValueType().getSimpleVT(), VT, Args[i].Ty, i,
1125611258
j * Parts[j].getValueType().getStoreSize().getKnownMinValue());
1125711259
if (NumParts > 1 && j == 0)
1125811260
MyFlags.Flags.setSplit();
@@ -11630,7 +11632,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
1163011632
ISD::ArgFlagsTy Flags;
1163111633
Flags.setSRet();
1163211634
MVT RegisterVT = TLI->getRegisterType(*DAG.getContext(), ValueVT);
11633-
ISD::InputArg RetArg(Flags, RegisterVT, ValueVT, true,
11635+
ISD::InputArg RetArg(Flags, RegisterVT, ValueVT, F.getReturnType(), true,
1163411636
ISD::InputArg::NoArgIndex, 0);
1163511637
Ins.push_back(RetArg);
1163611638
}
@@ -11768,7 +11770,7 @@ void SelectionDAGISel::LowerArguments(const Function &F) {
1176811770
// are responsible for handling scalable vector arguments and
1176911771
// return values.
1177011772
ISD::InputArg MyFlags(
11771-
Flags, RegisterVT, VT, isArgValueUsed, ArgNo,
11773+
Flags, RegisterVT, VT, Arg.getType(), isArgValueUsed, ArgNo,
1177211774
PartBase + i * RegisterVT.getStoreSize().getKnownMinValue());
1177311775
if (NumRegs > 1 && i == 0)
1177411776
MyFlags.Flags.setSplit();

‎llvm/lib/CodeGen/TargetLoweringBase.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1772,7 +1772,7 @@ void llvm::GetReturnInfo(CallingConv::ID CC, Type *ReturnType,
17721772
Flags.setZExt();
17731773

17741774
for (unsigned i = 0; i < NumParts; ++i)
1775-
Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, 0, 0));
1775+
Outs.push_back(ISD::OutputArg(Flags, PartVT, VT, ReturnType, 0, 0));
17761776
}
17771777
}
17781778

‎llvm/lib/Target/AArch64/AArch64CallingConvention.cpp

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,8 +75,10 @@ static bool finishStackBlock(SmallVectorImpl<CCValAssign> &PendingMembers,
7575
auto &It = PendingMembers[0];
7676
CCAssignFn *AssignFn =
7777
TLI->CCAssignFnForCall(State.getCallingConv(), /*IsVarArg=*/false);
78+
// FIXME: Get the correct original type.
79+
Type *OrigTy = EVT(It.getValVT()).getTypeForEVT(State.getContext());
7880
if (AssignFn(It.getValNo(), It.getValVT(), It.getValVT(), CCValAssign::Full,
79-
ArgFlags, State))
81+
ArgFlags, OrigTy, State))
8082
llvm_unreachable("Call operand has unhandled type");
8183

8284
// Return the flags to how they were before.

‎llvm/lib/Target/AArch64/AArch64CallingConvention.h

Lines changed: 28 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -18,52 +18,63 @@
1818
namespace llvm {
1919
bool CC_AArch64_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
2020
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
21-
CCState &State);
21+
Type *OrigTy, CCState &State);
2222
bool CC_AArch64_Arm64EC_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
2323
CCValAssign::LocInfo LocInfo,
24-
ISD::ArgFlagsTy ArgFlags, CCState &State);
24+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
25+
CCState &State);
2526
bool CC_AArch64_Arm64EC_Thunk(unsigned ValNo, MVT ValVT, MVT LocVT,
2627
CCValAssign::LocInfo LocInfo,
27-
ISD::ArgFlagsTy ArgFlags, CCState &State);
28+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
29+
CCState &State);
2830
bool CC_AArch64_Arm64EC_Thunk_Native(unsigned ValNo, MVT ValVT, MVT LocVT,
2931
CCValAssign::LocInfo LocInfo,
30-
ISD::ArgFlagsTy ArgFlags, CCState &State);
32+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
33+
CCState &State);
3134
bool CC_AArch64_DarwinPCS_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
3235
CCValAssign::LocInfo LocInfo,
33-
ISD::ArgFlagsTy ArgFlags, CCState &State);
36+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
37+
CCState &State);
3438
bool CC_AArch64_DarwinPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
3539
CCValAssign::LocInfo LocInfo,
36-
ISD::ArgFlagsTy ArgFlags, CCState &State);
40+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
41+
CCState &State);
3742
bool CC_AArch64_DarwinPCS_ILP32_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
38-
CCValAssign::LocInfo LocInfo,
39-
ISD::ArgFlagsTy ArgFlags, CCState &State);
43+
CCValAssign::LocInfo LocInfo,
44+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
45+
CCState &State);
4046
bool CC_AArch64_Win64PCS(unsigned ValNo, MVT ValVT, MVT LocVT,
4147
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
42-
CCState &State);
48+
Type *OrigTy, CCState &State);
4349
bool CC_AArch64_Win64_VarArg(unsigned ValNo, MVT ValVT, MVT LocVT,
4450
CCValAssign::LocInfo LocInfo,
45-
ISD::ArgFlagsTy ArgFlags, CCState &State);
51+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
52+
CCState &State);
4653
bool CC_AArch64_Win64_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
4754
CCValAssign::LocInfo LocInfo,
48-
ISD::ArgFlagsTy ArgFlags, CCState &State);
55+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
56+
CCState &State);
4957
bool CC_AArch64_Arm64EC_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
5058
CCValAssign::LocInfo LocInfo,
51-
ISD::ArgFlagsTy ArgFlags, CCState &State);
59+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
60+
CCState &State);
5261
bool CC_AArch64_GHC(unsigned ValNo, MVT ValVT, MVT LocVT,
5362
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
54-
CCState &State);
63+
Type *OrigTy, CCState &State);
5564
bool CC_AArch64_Preserve_None(unsigned ValNo, MVT ValVT, MVT LocVT,
5665
CCValAssign::LocInfo LocInfo,
57-
ISD::ArgFlagsTy ArgFlags, CCState &State);
66+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
67+
CCState &State);
5868
bool RetCC_AArch64_AAPCS(unsigned ValNo, MVT ValVT, MVT LocVT,
5969
CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags,
60-
CCState &State);
70+
Type *OrigTy, CCState &State);
6171
bool RetCC_AArch64_Arm64EC_Thunk(unsigned ValNo, MVT ValVT, MVT LocVT,
6272
CCValAssign::LocInfo LocInfo,
63-
ISD::ArgFlagsTy ArgFlags, CCState &State);
73+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
74+
CCState &State);
6475
bool RetCC_AArch64_Arm64EC_CFGuard_Check(unsigned ValNo, MVT ValVT, MVT LocVT,
6576
CCValAssign::LocInfo LocInfo,
66-
ISD::ArgFlagsTy ArgFlags,
77+
ISD::ArgFlagsTy ArgFlags, Type *OrigTy,
6778
CCState &State);
6879
} // namespace llvm
6980

‎llvm/lib/Target/AArch64/AArch64FastISel.cpp

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -267,7 +267,7 @@ class AArch64FastISel final : public FastISel {
267267
private:
268268
CCAssignFn *CCAssignFnForCall(CallingConv::ID CC) const;
269269
bool processCallArgs(CallLoweringInfo &CLI, SmallVectorImpl<MVT> &ArgVTs,
270-
unsigned &NumBytes);
270+
SmallVectorImpl<Type *> &OrigTys, unsigned &NumBytes);
271271
bool finishCall(CallLoweringInfo &CLI, unsigned NumBytes);
272272

273273
public:
@@ -3011,11 +3011,13 @@ bool AArch64FastISel::fastLowerArguments() {
30113011

30123012
bool AArch64FastISel::processCallArgs(CallLoweringInfo &CLI,
30133013
SmallVectorImpl<MVT> &OutVTs,
3014+
SmallVectorImpl<Type *> &OrigTys,
30143015
unsigned &NumBytes) {
30153016
CallingConv::ID CC = CLI.CallConv;
30163017
SmallVector<CCValAssign, 16> ArgLocs;
30173018
CCState CCInfo(CC, false, *FuncInfo.MF, ArgLocs, *Context);
3018-
CCInfo.AnalyzeCallOperands(OutVTs, CLI.OutFlags, CCAssignFnForCall(CC));
3019+
CCInfo.AnalyzeCallOperands(OutVTs, CLI.OutFlags, OrigTys,
3020+
CCAssignFnForCall(CC));
30193021

30203022
// Get a count of how many bytes are to be pushed on the stack.
30213023
NumBytes = CCInfo.getStackSize();
@@ -3194,6 +3196,7 @@ bool AArch64FastISel::fastLowerCall(CallLoweringInfo &CLI) {
31943196

31953197
// Set up the argument vectors.
31963198
SmallVector<MVT, 16> OutVTs;
3199+
SmallVector<Type *, 16> OrigTys;
31973200
OutVTs.reserve(CLI.OutVals.size());
31983201

31993202
for (auto *Val : CLI.OutVals) {
@@ -3207,6 +3210,7 @@ bool AArch64FastISel::fastLowerCall(CallLoweringInfo &CLI) {
32073210
return false;
32083211

32093212
OutVTs.push_back(VT);
3213+
OrigTys.push_back(Val->getType());
32103214
}
32113215

32123216
Address Addr;
@@ -3222,7 +3226,7 @@ bool AArch64FastISel::fastLowerCall(CallLoweringInfo &CLI) {
32223226

32233227
// Handle the arguments now that we've gotten them.
32243228
unsigned NumBytes;
3225-
if (!processCallArgs(CLI, OutVTs, NumBytes))
3229+
if (!processCallArgs(CLI, OutVTs, OrigTys, NumBytes))
32263230
return false;
32273231

32283232
const AArch64RegisterInfo *RegInfo = Subtarget->getRegisterInfo();

0 commit comments

Comments
 (0)