Fold RISCV sign extension operations is their result will compared with zero.

sext_ext(0) == 0.

Author: bababuck

llvm/lib/Target/RISCV/RISCVISelLowering.cpp

@@ -17201,6 +17201,12 @@ static bool combine_CC(SDValue &LHS, SDValue &RHS, SDValue &CC, const SDLoc &DL,
     return true;
   }
 
+  // Fold ((sext X), 0, eq/ne) -> (X, 0, eq/ne)
+  if (LHS.getOpcode() == ISD::SIGN_EXTEND_INREG && isNullConstant(RHS)) {
+    LHS = LHS.getOperand(0);
+    return true;
+  }
+
   // Fold ((srl (and X, 1<<C), C), 0, eq/ne) -> ((shl X, XLen-1-C), 0, ge/lt)
   if (isNullConstant(RHS) && LHS.getOpcode() == ISD::SRL && LHS.hasOneUse() &&
       LHS.getOperand(1).getOpcode() == ISD::Constant) {

llvm/test/CodeGen/RISCV/select-constant-xor.ll

@@ -255,8 +255,7 @@ define i32 @branch_sext_ret(i32 %x) {
 ;
 ; RV64-LABEL: branch_sext_ret:
 ; RV64:       # %bb.0: # %entry
-; RV64-NEXT:    sext.w a1, a0
-; RV64-NEXT:    beqz a1, .LBB11_2
+; RV64-NEXT:    beqz a0, .LBB11_2
 ; RV64-NEXT:  # %bb.1: # %if.then
 ; RV64-NEXT:    ret
 ; RV64-NEXT:  .LBB11_2: # %if.end